Kyösti Mälkki has uploaded this change for review.

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[WIP] sb/intel: Always raise SMI with APM_CNT_FINALIZE

At least google/stout has APM_CNT_FINALIZE handler in mainboard,
so mainboard_smi_apmc() should be an unconditional call.

Change-Id: I7b6450e0c8436e1c6113d54b7987b6b486908ed9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
---
M src/southbridge/intel/bd82x6x/lpc.c
M src/southbridge/intel/bd82x6x/smihandler.c
M src/southbridge/intel/ibexpeak/lpc.c
M src/southbridge/intel/ibexpeak/smihandler.c
M src/southbridge/intel/lynxpoint/lpc.c
M src/southbridge/intel/lynxpoint/smihandler.c
6 files changed, 21 insertions(+), 15 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/41992/1

diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c
index 7bfde3f..170f4b4 100644
--- a/src/southbridge/intel/bd82x6x/lpc.c
+++ b/src/southbridge/intel/bd82x6x/lpc.c
@@ -827,10 +827,7 @@
 	spi_finalize_ops();
 
 	/* Call SMM finalize() handlers before resume */
-	if (CONFIG(INTEL_CHIPSET_LOCKDOWN) ||
-	    acpi_is_wakeup_s3()) {
-		apm_control(APM_CNT_FINALIZE);
-	}
+	apm_control(APM_CNT_FINALIZE);
 }
 
 void intel_southbridge_override_spi(
diff --git a/src/southbridge/intel/bd82x6x/smihandler.c b/src/southbridge/intel/bd82x6x/smihandler.c
index f778f7a..721cfe4 100644
--- a/src/southbridge/intel/bd82x6x/smihandler.c
+++ b/src/southbridge/intel/bd82x6x/smihandler.c
@@ -210,6 +210,9 @@
 
 void southbridge_finalize_all(void)
 {
+	if (!CONFIG(INTEL_CHIPSET_LOCKDOWN) && !acpi_is_wakeup_s3())
+		return;
+
 	intel_me_finalize_smm();
 	intel_pch_finalize_smm();
 	intel_sandybridge_finalize_smm();
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index 9a115f7..bdfd8e0 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -720,10 +720,7 @@
 	spi_finalize_ops();
 
 	/* Call SMM finalize() handlers before resume */
-	if (CONFIG(INTEL_CHIPSET_LOCKDOWN) ||
-	    acpi_is_wakeup_s3()) {
-		apm_control(APM_CNT_FINALIZE);
-	}
+	apm_control(APM_CNT_FINALIZE);
 }
 
 static struct pci_operations pci_ops = {
diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c
index a881f33..b8ff520 100644
--- a/src/southbridge/intel/ibexpeak/smihandler.c
+++ b/src/southbridge/intel/ibexpeak/smihandler.c
@@ -168,6 +168,9 @@
 
 void southbridge_finalize_all(void)
 {
+	if (!CONFIG(INTEL_CHIPSET_LOCKDOWN) && !acpi_is_wakeup_s3())
+		return;
+
 	intel_me_finalize_smm();
 	intel_pch_finalize_smm();
 	intel_ironlake_finalize_smm();
diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c
index d3a066e..782ecb5 100644
--- a/src/southbridge/intel/lynxpoint/lpc.c
+++ b/src/southbridge/intel/lynxpoint/lpc.c
@@ -913,8 +913,7 @@
 {
 	spi_finalize_ops();
 
-	if (acpi_is_wakeup_s3() || CONFIG(INTEL_CHIPSET_LOCKDOWN))
-		apm_control(APM_CNT_FINALIZE);
+	apm_control(APM_CNT_FINALIZE);
 }
 
 static struct pci_operations pci_ops = {
diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c
index 8bbe3fe..74e0802 100644
--- a/src/southbridge/intel/lynxpoint/smihandler.c
+++ b/src/southbridge/intel/lynxpoint/smihandler.c
@@ -287,11 +287,7 @@
 			return;
 		}
 
-		intel_me_finalize_smm();
-		intel_pch_finalize_smm();
-		intel_northbridge_haswell_finalize_smm();
-		intel_cpu_haswell_finalize_smm();
-
+		southbridge_finalize_all();
 		chipset_finalized = 1;
 		break;
 	case APM_CNT_CST_CONTROL:
@@ -556,3 +552,14 @@
 		}
 	}
 }
+
+void southbridge_finalize_all(void)
+{
+	if (!CONFIG(INTEL_CHIPSET_LOCKDOWN) && !acpi_is_wakeup_s3())
+		return;
+
+	intel_me_finalize_smm();
+	intel_pch_finalize_smm();
+	intel_northbridge_haswell_finalize_smm();
+	intel_cpu_haswell_finalize_smm();
+}

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