[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Add required FSP UPD changes for CML

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31284 )

Change subject: soc/intel/cannonlake: Add required FSP UPD changes for CML
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Patch Set 4:

(1 comment)

https://review.coreboot.org/#/c/31284/4/src/soc/intel/cannonlake/chip.h 
File src/soc/intel/cannonlake/chip.h:

https://review.coreboot.org/#/c/31284/4/src/soc/intel/cannonlake/chip.h@302 
PS4, Line 302: SOC_INTEL_UART_DEV_MAX
> better to define in SOC Kconfig, with rest of the LPSS controllers

Can you please check this: 
https://review.coreboot.org/#/c/coreboot/+/31213/

Furquan is looking at that way..