Arthur Heymans uploaded patch set #2 to this change.

View Change

[NEEDSTEST]cpu/amd/family14: Use parallel mp init

This now computes an MTRR solution based on coreboots allocation and
always uses that solution over the one set by AGESA.
Syncing MSR is now done in sipi_vector.S.

Change-Id: I73a866462b0cb6fcaeb0a47eef7a1b16747240fb
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/cpu/amd/agesa/family14/model_14_init.c
M src/cpu/amd/smm/smm_helper.c
M src/northbridge/amd/agesa/family14/Kconfig
M src/northbridge/amd/agesa/family14/northbridge.c
4 files changed, 37 insertions(+), 80 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/64495/2

To view, visit change 64495. To unsubscribe, or for help writing mail filters, visit settings.

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I73a866462b0cb6fcaeb0a47eef7a1b16747240fb
Gerrit-Change-Number: 64495
Gerrit-PatchSet: 2
Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Michał Kopeć <michal.kopec@3mdeb.com>
Gerrit-CC: Michał Żygowski <michal.zygowski@3mdeb.com>
Gerrit-CC: Paul Menzel <paulepanter@mailbox.org>
Gerrit-MessageType: newpatchset