post_code: replace postcode values with their respective defined constants

* Replace existing post_code call values with their defined constants
* Reorganize certain post_code calls to match their respective defines
* Updated define values reflect the newer changes to post_codes.h

Signed-off-by: Sindhoor Tilak <sindhoor@sin9yt.net>
Change-Id: If32f43104a829bd1db0d5f5340cc94bf0c717c39
---
M src/arch/x86/tables.c
M src/cpu/intel/car/core2/cache_as_ram.S
M src/cpu/intel/car/non-evict/cache_as_ram.S
M src/cpu/intel/car/non-evict/exit_car.S
M src/cpu/intel/car/p3/cache_as_ram.S
M src/cpu/intel/car/p4-netburst/cache_as_ram.S
M src/cpu/intel/car/p4-netburst/exit_car.S
M src/cpu/intel/haswell/romstage.c
M src/cpu/qemu-x86/cache_as_ram_bootblock.S
M src/cpu/x86/mtrr/mtrr.c
M src/device/pci_device.c
M src/drivers/amd/agesa/cache_as_ram.S
M src/drivers/intel/fsp1_1/cache_as_ram.S
M src/drivers/intel/fsp1_1/raminit.c
M src/drivers/intel/fsp1_1/romstage.c
M src/mainboard/amd/thatcher/bootblock.c
M src/mainboard/google/auron/ec.c
M src/mainboard/google/cyan/ec.c
M src/mainboard/google/link/ec.c
M src/mainboard/google/rambi/ec.c
M src/mainboard/google/slippy/ec.c
M src/mainboard/intel/strago/ec.c
M src/northbridge/intel/pineview/romstage.c
M src/northbridge/intel/sandybridge/raminit.c
M src/northbridge/intel/sandybridge/raminit_mrc.c
M src/northbridge/intel/sandybridge/romstage.c
M src/soc/amd/common/block/cpu/car/cache_as_ram.S
M src/soc/amd/picasso/bootblock/pre_c.S
M src/soc/amd/picasso/romstage.c
M src/soc/amd/stoneyridge/bootblock/bootblock.c
M src/soc/amd/stoneyridge/chip.c
M src/soc/amd/stoneyridge/romstage.c
M src/soc/intel/broadwell/romstage/romstage.c
M src/soc/intel/common/block/cpu/car/cache_as_ram.S
M src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
M src/soc/intel/quark/bootblock/esram_init.S
M src/soc/intel/quark/romstage/fsp_params.c
M src/southbridge/intel/common/finalize.c
38 files changed, 105 insertions(+), 109 deletions(-)