Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47488 )
Change subject: nb/intel/sandybridge: Fix typo in comment ......................................................................
nb/intel/sandybridge: Fix typo in comment
Change-Id: I8271911695f41ef7cac1bb228309af0568e5bb0c Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/47488 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Rudolph siro@das-labor.org --- M src/northbridge/intel/sandybridge/raminit_common.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index e23753a..57c28fc 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -4238,7 +4238,7 @@ * The following loops writes to every DRAM address, setting the ECC bits to the * correct value. A read from this location will no longer return a CRC error, * except when a bit has toggled due to external events. - * The same could be accieved by writing to the physical memory map, but it's + * The same could be achieved by writing to the physical memory map, but it's * much more difficult due to SMM remapping, ME stolen memory, GFX stolen memory, * and firmware running in x86_32. */