6 comments:
File Documentation/soc/amd/psp_integration.md:
See if the change works any better for you.
yes, that makes things clearer
Patch Set #3, Line 181: * Optional image containing a signed whitelist of serial number(s).
Done
my question was more from what components the serial numbers are. are these cpu/chipset serial numbers that are fused into the chips?
Done
this makes it much clearer to me
Ack. […]
so cbfstool is used twice? first for the x86 coreboot part that gets compressed and a header added by cbfstool/amdcompress; amdfwtool takes the resulting image and the psp blobs and makes an image from that that gets fed back into cbfstool? or does amdfwtool create the image that gets written to the flash? Or does cbfstool/amdcompress compress the stages and then cbfstool adds the output of amdfwtool and hopes that there won't be mismatched offsets/pointers?
haven't looked at the source, but i'd expect this to work like this: the coreboot stages that run on the x86 get built, the stages and the amd x86 fsp blobs get added to a cbfs, the whole cbfs gets compressed and a header added. the resulting image gets consumed by amdfwtool that adds the psp blobs, creates the tables described above and generates a firmware image that gets written to the flash. from what you wrote it works somehow differently, but i'm not completely sure how and why.
if this will likely change in the future, i'm ok with adding that information later.
Patch Set #3, Line 357: passed in
Done. Well that's fine, of course. […]
i'd use those phrases for the arguments/files passed to the tool; here the context is the resulting binary and not the arguments to the tool
File Documentation/soc/amd/psp_integration.md:
please also add the bits for this and the next line
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