Attention is currently required from: Federico Amedeo Izzo.

Federico Amedeo Izzo uploaded patch set #3 to this change.

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The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins)

mb/aoostar: Add AOOSTAR R1 (WTR_R1)

AOOSTAR R1 is a Chinese NAS based on Intel N100 (Alder Lake N), with two 3.5" HDD slots,
an M.2 NVMe 2280 SSD slot and a single DDR4 SODIMM slot.
It also comes with 2x 2.5Gb Intel NICs, Intel AX200 WiFi + BT and USB-C Alt-DP Power Delivery.

Working:
- Automatic FAN control (IT8613E SuperIO)
- M.2 NVME slot
- 2x SATA ports
- 2.0 USB ports
- USB-C port with Alt-DP and PD
- HDMI / DisplayPort ports
- 2x 2.5Gb NICs
- WiFi + BT
- ASPM (Unavailable on stock)
- Linux/Windows UEFI booting with EDK2

Broken:
- Power button (OFF->ON broken, ON->OFF works)
- USB 3.0 ports

Untested:
- Internal audio
- MicroSD card reader
- S3

My motivation for doing this port is enabling ASPM, as it makes a great difference on
idle power consumption (from 8.4W to 5W measured from the wall).

The last remaining annoyance of this port is the power button not working.
I spent a few hours double checking the SuperIO registers but then I gave up.
A workaround for this is to use the "ON after power loss" feature and reconnect the power cord
to turn on the board. It's not a big problem for a NAS that will stay ON 24/7.

VDT extracted from vendor BIOS.
Compiled with IFD descriptor, ME blob and vgabios blob (ID 8086,0406) extracted from vendor BIOS.

The board can be flashed externally using a 1.8V adapter, I used a CH341a modded for 3.3V I/O.
Internal flashing could work too as SPI flash is not read/write protected, but I haven't tried.

Change-Id: I9414eb742b6b90459e010b038c1994537e9801a5
Signed-off-by: Federico Amedeo Izzo <federico@izzo.pro>
---
A src/mainboard/aoostar/Kconfig
A src/mainboard/aoostar/Kconfig.name
A src/mainboard/aoostar/wtr_r1/Kconfig
A src/mainboard/aoostar/wtr_r1/Kconfig.name
A src/mainboard/aoostar/wtr_r1/Makefile.mk
A src/mainboard/aoostar/wtr_r1/board_info.txt
A src/mainboard/aoostar/wtr_r1/bootblock.c
A src/mainboard/aoostar/wtr_r1/data.vbt
A src/mainboard/aoostar/wtr_r1/devicetree.cb
A src/mainboard/aoostar/wtr_r1/dsdt.asl
A src/mainboard/aoostar/wtr_r1/gpio.h
A src/mainboard/aoostar/wtr_r1/romstage_fsp_params.c
12 files changed, 744 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/82010/3

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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I9414eb742b6b90459e010b038c1994537e9801a5
Gerrit-Change-Number: 82010
Gerrit-PatchSet: 3
Gerrit-Owner: Federico Amedeo Izzo <federico@izzo.pro>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Gerrit-Attention: Federico Amedeo Izzo <federico@izzo.pro>
Gerrit-MessageType: newpatchset