Kyösti Mälkki has uploaded this change for review.

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[WIP] arch/x86: Combine bootblock linker scripts

Change-Id: Ie8629a89fa47a28db63ecc33c631b29ac5a77448
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
---
D src/arch/x86/id.ld
M src/arch/x86/memlayout.ld
D src/cpu/intel/fit/fit.ld
D src/cpu/x86/16bit/entry16.ld
M src/cpu/x86/16bit/reset16.ld
5 files changed, 24 insertions(+), 33 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/47597/1
diff --git a/src/arch/x86/id.ld b/src/arch/x86/id.ld
deleted file mode 100644
index b69a8dc..0000000
--- a/src/arch/x86/id.ld
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-SECTIONS {
- . = (0xffffffff - CONFIG_ID_SECTION_OFFSET) - (__id_end - __id_start) + 1;
- .id (.): {
- KEEP(*(.id))
- }
-}
diff --git a/src/arch/x86/memlayout.ld b/src/arch/x86/memlayout.ld
index cbf887c..b487e48 100644
--- a/src/arch/x86/memlayout.ld
+++ b/src/arch/x86/memlayout.ld
@@ -40,10 +40,5 @@

#if ENV_BOOTBLOCK
/* Bootblock specific scripts which provide more SECTION directives. */
-#include <cpu/x86/16bit/entry16.ld>
#include <cpu/x86/16bit/reset16.ld>
-#include <arch/x86/id.ld>
-#if CONFIG(CPU_INTEL_FIRMWARE_INTERFACE_TABLE)
-#include <cpu/intel/fit/fit.ld>
-#endif
#endif /* ENV_BOOTBLOCK */
diff --git a/src/cpu/intel/fit/fit.ld b/src/cpu/intel/fit/fit.ld
deleted file mode 100644
index 2e8749b..0000000
--- a/src/cpu/intel/fit/fit.ld
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-SECTIONS {
- . = 0xffffffc0;
- .fit_pointer (.): {
- KEEP(*(.fit_pointer))
- }
-}
diff --git a/src/cpu/x86/16bit/entry16.ld b/src/cpu/x86/16bit/entry16.ld
deleted file mode 100644
index bc456e7..0000000
--- a/src/cpu/x86/16bit/entry16.ld
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-gdtptr16_offset = gdtptr16 & 0xffff;
-nullidt_offset = nullidt & 0xffff;
-
-/* Symbol _start16bit must be aligned to 4kB to start AP CPUs with
- * Startup IPI message without RAM.
- */
-#if CONFIG(SIPI_VECTOR_IN_ROM)
-_bogus = ASSERT((_start16bit & 0xfff) == 0, "Symbol _start16bit is not at 4 KiB boundary");
-ap_sipi_vector_in_rom = (_start16bit >> 12) & 0xff;
-#endif
diff --git a/src/cpu/x86/16bit/reset16.ld b/src/cpu/x86/16bit/reset16.ld
index e00e0b4..1c7e40f 100644
--- a/src/cpu/x86/16bit/reset16.ld
+++ b/src/cpu/x86/16bit/reset16.ld
@@ -1,5 +1,16 @@
/* SPDX-License-Identifier: GPL-2.0-only */

+gdtptr16_offset = gdtptr16 & 0xffff;
+nullidt_offset = nullidt & 0xffff;
+
+/* Symbol _start16bit must be aligned to 4kB to start AP CPUs with
+ * Startup IPI message without RAM.
+ */
+#if CONFIG(SIPI_VECTOR_IN_ROM)
+_bogus = ASSERT((_start16bit & 0xfff) == 0, "Symbol _start16bit is not at 4 KiB boundary");
+ap_sipi_vector_in_rom = (_start16bit >> 12) & 0xff;
+#endif
+
/*
* _ROMTOP : The top of the ROM used where we
* need to put the reset vector.
@@ -8,6 +19,19 @@
SECTIONS {
/* Trigger an error if I have an unuseable start address */
_bogus = ASSERT(_start16bit >= 0xffff0000, "_start16bit too low. Please report.");
+
+ . = (0xffffffff - CONFIG_ID_SECTION_OFFSET) - (__id_end - __id_start) + 1;
+ .id (.): {
+ KEEP(*(.id))
+ }
+
+#if CONFIG(CPU_INTEL_FIRMWARE_INTERFACE_TABLE)
+ . = 0xffffffc0;
+ .fit_pointer (.): {
+ KEEP(*(.fit_pointer))
+ }
+#endif
+
_ROMTOP = 0xfffffff0;
. = _ROMTOP;
.reset . : {

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ie8629a89fa47a28db63ecc33c631b29ac5a77448
Gerrit-Change-Number: 47597
Gerrit-PatchSet: 1
Gerrit-Owner: Kyösti Mälkki <kyosti.malkki@gmail.com>
Gerrit-Reviewer: Julius Werner <jwerner@chromium.org>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-MessageType: newchange