Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Patrick Rudolph.

Subrata Banik uploaded patch set #3 to this change.

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soc/intel/common/block/cpu: Refactor LLC non-eviction mask calculation

List of changes:

1. The total LLC size/way size gives the number of ways of LLC.
DCACHE_RAM_SIZE/way size gives the number of data ways that need
to be configured for non-eviction.

2. Move LLC non-eviction mask calculation prior to programming
MSR 0xC92 to maintain parity with other MSR programming i.e. MSR
0xC91.

Change-Id: Ifcbd577c360a1ebc34cbd4770ef12aad82b4fc71
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
---
M src/soc/intel/common/block/cpu/car/cache_as_ram.S
1 file changed, 6 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/51251/3

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