[coreboot-gerrit] Change in ...coreboot[master]: soc/intel/cannonlake: Add required FSP UPD changes for CML

[Subrata Banik (Code Review)]

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31284 )

Change subject: soc/intel/cannonlake: Add required FSP UPD changes for CML
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Patch Set 9:

(1 comment)

https://review.coreboot.org/#/c/31284/9/src/soc/intel/cannonlake/include/soc... 
File src/soc/intel/cannonlake/include/soc/serialio.h:

https://review.coreboot.org/#/c/31284/9/src/soc/intel/cannonlake/include/soc... 
PS9, Line 20: typedef enum {
            : 	PchSerialIoDisabled,
            : 	PchSerialIoPci,
            : 	PchSerialIoAcpi,
            : 	PchSerialIoHidden,
            : #if IS_ENABLED(CONFIG_SOC_INTEL_COMETLAKE)
            : 	PchSerialIoSkipInit
            : #endif
            : } PCH_SERIAL_IO_MODE;
@Maulik: lets redefine this as below

#if IS_ENABLED(CONFIG_SOC_INTEL_COMETLAKE)
typedef enum {
    PchSerialIoDisabled,
    PchSerialIoPci,
    PchSerialIoHidden,
    PchSerialIoLegacyUart,
        PchSerialIoSkipInit
} PCH_SERIAL_IO_MODE;
#else
typedef enum {
    PchSerialIoDisabled,
    PchSerialIoPci,
    PchSerialIoAcpi,
    PchSerialIoHidden,
} PCH_SERIAL_IO_MODE;
#endif

as I could see its been different in overall enum field.

Note: SerialIoSkipInit is no more only applicable for UART as part in FSP because you can use the same UPD value in order to skip I2C and SPI controller programming as well if decide to make the same in coreboot.