Lucas Chen has uploaded this change for review.
zork/var/ezkinil: Adjust USB2 phy si fine tune on DVT Board
Adjust USB2 phy si setting fine tune on DVT for Ezkinil.
BRANCH=zork
BUG=b:156315391
TEST=Measuring scope timing and test usb detection
Signed-off-by: Lucas Chen <lucas.chen@quanta.corp-partner.google.com>
Change-Id: Id537b6e9a17f47481b6aedcea0c6a8474d993b6d
---
M src/mainboard/google/zork/variants/ezkinil/overridetree.cb
1 file changed, 26 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/47011/1
diff --git a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb
index 5ef2f0a..a15a33b 100644
--- a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb
+++ b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb
@@ -22,6 +22,32 @@
# End : OPN Performance Configuration
+ #USB 2.0 strength
+ register "usb_2_port_tune_params[2]" = "{
+ .com_pds_tune = 0x05,
+ .sq_rx_tune = 0x3,
+ .tx_fsls_tune = 0x3,
+ .tx_pre_emp_amp_tune = 0x03,
+ .tx_pre_emp_pulse_tune = 0x0,
+ .tx_rise_tune = 0x1,
+ .rx_vref_tune = 0x9,
+ .tx_hsxv_tune = 0x3,
+ .tx_res_tune = 0x01,
+ }"
+
+ register "usb_2_port_tune_params[3]" = "{
+ .com_pds_tune = 0x05,
+ .sq_rx_tune = 0x3,
+ .tx_fsls_tune = 0x3,
+ .tx_pre_emp_amp_tune = 0x03,
+ .tx_pre_emp_pulse_tune = 0x0,
+ .tx_rise_tune = 0x1,
+ .rx_vref_tune = 0x9,
+ .tx_hsxv_tune = 0x3,
+ .tx_res_tune = 0x01,
+ }"
+
+
register "usb3_port_force_gen1" = "{
.ports.xhci0_port0 = 1,
.ports.xhci0_port1 = 1,
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