Felix Held submitted this change.

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Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved Shuo Liu: Looks good to me, but someone else must approve
acpi/acpi: Pass struct device to acpi_create_srat_gia_pci

Instead of S:B:D:F numbers pass the struct device to
acpi_create_srat_gia_pci and let it extract the information needed.

This also adds support for PCI multi segment groups.

Change-Id: Iafe32e98f0c85f14347695ccaa0225e43fad99e7
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80258
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/acpi/acpi.c
M src/include/acpi/acpi.h
M src/soc/intel/xeon_sp/uncore_acpi_cxl.c
3 files changed, 15 insertions(+), 16 deletions(-)

diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c
index 6bf452e..98c8ecd 100644
--- a/src/acpi/acpi.c
+++ b/src/acpi/acpi.c
@@ -352,17 +352,22 @@
}

int acpi_create_srat_gia_pci(acpi_srat_gia_t *gia, u32 proximity_domain,
- u16 seg, u8 bus, u8 dev, u8 func, u32 flags)
+ struct device *dev, u32 flags)
{
+ /* Only handle PCI devices. */
+ if (dev->path.type != DEVICE_PATH_PCI)
+ return 0;
+
gia->type = ACPI_SRAT_STRUCTURE_GIA;
gia->length = sizeof(acpi_srat_gia_t);
gia->proximity_domain = proximity_domain;
gia->dev_handle_type = ACPI_SRAT_GIA_DEV_HANDLE_PCI;
/* First two bytes has segment number */
- memcpy(gia->dev_handle, &seg, 2);
- gia->dev_handle[2] = bus; /* Byte 2 has bus number */
+ gia->dev_handle[0] = dev->upstream->segment_group;
+ gia->dev_handle[1] = 0;
+ gia->dev_handle[2] = dev->upstream->secondary; /* Byte 2 has bus number */
/* Byte 3 has bits 7:3 for dev, bits 2:0 for func */
- gia->dev_handle[3] = PCI_SLOT(dev) | PCI_FUNC(func);
+ gia->dev_handle[3] = dev->path.pci.devfn;
gia->flags = flags;

return gia->length;
diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h
index d5f4008..c39683e 100644
--- a/src/include/acpi/acpi.h
+++ b/src/include/acpi/acpi.h
@@ -1782,7 +1782,7 @@
* and flag, create Generic Initiator Affinity structure in SRAT.
*/
int acpi_create_srat_gia_pci(acpi_srat_gia_t *gia, u32 proximity_domain,
- u16 seg, u8 bus, u8 dev, u8 func, u32 flags);
+ struct device *dev, u32 flags);
unsigned long acpi_create_srat_lapics(unsigned long current);
void acpi_create_srat(acpi_srat_t *srat,
unsigned long (*acpi_fill_srat)(unsigned long current));
diff --git a/src/soc/intel/xeon_sp/uncore_acpi_cxl.c b/src/soc/intel/xeon_sp/uncore_acpi_cxl.c
index 5bd13d0..40a5f12 100644
--- a/src/soc/intel/xeon_sp/uncore_acpi_cxl.c
+++ b/src/soc/intel/xeon_sp/uncore_acpi_cxl.c
@@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */

-#include <device/pci_ops.h>
#include <soc/acpi.h>
#include <soc/numa.h>
#include <soc/util.h>
@@ -13,19 +12,14 @@
* In the pds (Proximity Domains structure), Generic Initiator domains
* are after processor domains.
*/
- uint16_t seg = 0;
- uint8_t bus, dev, func;
uint32_t base, size;
for (uint8_t i = soc_get_num_cpus(); i < pds.num_pds; i++) {
- bus = PCI_BDF(pds.pds[i].dev) >> 20;
- dev = (PCI_BDF(pds.pds[i].dev) >> 15) & 0x1f;
- func = (PCI_BDF(pds.pds[i].dev) >> 12) & 0x07;
- printk(BIOS_DEBUG,
- "adding srat GIA ID: %d, seg: 0x%x, bus: 0x%x, dev: 0x%x, func: 0x%x\n",
- i, seg, bus, dev, func);
+ if (!pds.pds[i].dev)
+ continue;
+
+ printk(BIOS_DEBUG, "adding srat GIA ID: %d, dev: %s\n", i, dev_path(pds.pds[i].dev));
/* flags: 1 (enabled) */
- current += acpi_create_srat_gia_pci((acpi_srat_gia_t *)current, i, seg, bus,
- dev, func, 1);
+ current += acpi_create_srat_gia_pci((acpi_srat_gia_t *)current, i, pds.pds[i].dev, 1);
base = pds.pds[i].base << 16;
size = pds.pds[i].size << 16;
printk(BIOS_DEBUG,

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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Iafe32e98f0c85f14347695ccaa0225e43fad99e7
Gerrit-Change-Number: 80258
Gerrit-PatchSet: 5
Gerrit-Owner: Patrick Rudolph <patrick.rudolph@9elements.com>
Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Christian Walter <christian.walter@9elements.com>
Gerrit-Reviewer: Cliff Huang <cliff.huang@intel.com>
Gerrit-Reviewer: Felix Held <felix-coreboot@felixheld.de>
Gerrit-Reviewer: Johnny Lin <Johnny_Lin@wiwynn.com>
Gerrit-Reviewer: Lance Zhao <lance.zhao@gmail.com>
Gerrit-Reviewer: Lean Sheng Tan <sheng.tan@9elements.com>
Gerrit-Reviewer: Shuo Liu <shuo.liu@intel.com>
Gerrit-Reviewer: Tim Chu <Tim.Chu@quantatw.com>
Gerrit-Reviewer: Tim Wawrzynczak <inforichland@gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged