Meera Ravindranath uploaded patch set #6 to this change.

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soc/intel/jasperlake: Add VR Configuration settings

This CL fixes the CPU Throttling issue.

BUG=b:167472333
TEST=Build and boot dedede and observe the slope and offset values
     getting updated in the fsp debug log

Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Change-Id: I3fa32218040263f0abef8b9dd4c52efb31289fd7
---
M src/soc/intel/jasperlake/chip.h
M src/soc/intel/jasperlake/fsp_params.c
2 files changed, 8 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/45645/6

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