arch/x86: Set RTC century byte offset in FADT x86-wide

The century byte of the year is stored in CMOS at offset 0x32 for all
x86 platforms (done by MC146818 RTC code which is default enabled for
x86). This location is not fixed per definition but is established
during the past years as 'de facto' standard. This offset is passed into
the OS via the ACPI FADT where e.g. Linux uses it if it is set to
something != 0.
Currently this byte is set differently on all the platforms, either to
0x32 or to 0x0 or even to nothing which results in 0x0.

Since this is architecture specific and valid for all the platforms,
set this century byte once in the architecture specific code.

Change-Id: I8fa5ddc368c129a5f847c64064374aae2d4f0c43
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
---
M src/arch/x86/acpi.c
M src/soc/amd/cezanne/acpi.c
M src/soc/amd/cezanne/include/soc/acpi.h
M src/soc/amd/picasso/acpi.c
M src/soc/amd/stoneyridge/acpi.c
M src/soc/intel/baytrail/fadt.c
M src/soc/intel/braswell/fadt.c
M src/soc/intel/broadwell/pch/fadt.c
M src/soc/intel/denverton_ns/acpi.c
M src/soc/intel/elkhartlake/acpi.c
M src/soc/intel/skylake/fadt.c
M src/soc/intel/xeon_sp/skx/soc_acpi.c
M src/southbridge/amd/agesa/hudson/fadt.c
M src/southbridge/amd/cimx/sb800/fadt.c
M src/southbridge/amd/pi/hudson/fadt.c
M src/southbridge/intel/bd82x6x/fadt.c
M src/southbridge/intel/i82371eb/fadt.c
M src/southbridge/intel/i82801dx/fadt.c
M src/southbridge/intel/i82801gx/fadt.c
M src/southbridge/intel/i82801ix/fadt.c
M src/southbridge/intel/i82801jx/fadt.c
M src/southbridge/intel/ibexpeak/fadt.c
M src/southbridge/intel/lynxpoint/fadt.c
23 files changed, 2 insertions(+), 23 deletions(-)