Attention is currently required from: Rex-BC Chen, Julius Werner, Yu-Ping Wu.

3 comments:

File src/soc/mediatek/mt8186/include/soc/memlayout.ld:
- Patch Set #2, Line 25:
```
TTB(0x00100000, 28K)
	DMA_COHERENT(0x00107000, 4K)
	TPM_TCPA_LOG(0x00108000, 2K)
	FMAP_CACHE(0x00108800, 2K)
	WATCHDOG_TOMBSTONE(0x00109000, 4)
	CBFS_MCACHE(0x00109004, 16K - 4)
	/* EMPTY(0x0010d000, 4K) */
	STACK(0x0010E000, 7K)
	TIMESTAMP(0x0010FC00, 1K)
	/* MT8186 has 64KB SRAM. */
```
  Done, with slight adjustment. […]
  I think you are right. For stack, we usually initialize and start using from its bottom, so 7k-4 will be used as init address and that's probably why it failed (arm in early stage does not allow unaligned access). Although I thought 7k-8 should work... anyway let's try to make stack always aligned to 1k.
File src/soc/mediatek/mt8186/include/soc/memlayout.ld:
- Patch Set #3, Line 31: /
  should we also indicate the empty 1k-4 ?
- Patch Set #3, Line 36: /* EMPTY(0x0010f400, 3K) */
  8195 has 12k for stack. if we still have empty 3k, what about putting them back to stack so we have 10k stack?

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