Attention is currently required from: Arthur Heymans, Philipp Hug.

Philipp Hug uploaded patch set #7 to this change.

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riscv/mb/qemu: fix DRAM probing

Current version of qemu raise an exception when accessing invalid memory.
Modify the probing code to temporary redirect the exception handler like on
ARM platform.
Also move saving of the stack frame out to trap_util.S to have all at the same
place for a future rewrite.

TEST=boots to ramstage
Change-Id: I25860f688c7546714f6fdbce8c8f96da6400813c
Signed-off-by: Philipp Hug <philipp@hug.cx>
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/arch/riscv/Makefile.mk
M src/arch/riscv/include/arch/exception.h
A src/arch/riscv/ramdetect.c
M src/arch/riscv/trap_handler.c
M src/arch/riscv/trap_util.S
M src/lib/imd_cbmem.c
M src/lib/ramdetect.c
7 files changed, 63 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/36486/7

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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I25860f688c7546714f6fdbce8c8f96da6400813c
Gerrit-Change-Number: 36486
Gerrit-PatchSet: 7
Gerrit-Owner: Philipp Hug <philipp@hug.cx>
Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz>
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