Attention is currently required from: Cliff Huang, Tim Wawrzynczak, Bernardo Perez Priego, Patrick Rudolph.

Furquan Shaikh uploaded patch set #9 to this change.

View Change

southbridge/intel/common: Add an option to allow stitching of CSE binary

In the following changes, CSE binary for some platforms will be
stitched at build time instead of adding a pre-built binary. This
change adds a new Kconfig `STITCH_ME_BIN` which allows mainboard to
select if it wants to stitch CSE binary instead of adding a pre-built
one. In this case, ME_BIN_PATH is not visible to user and instead
mainboard and/or SoC code is expected to provide the recipe for
stitching the CSE image.

Change-Id: I78ab377e110610f9ef4d86a2b6eeb4113897df85
Signed-off-by: Furquan Shaikh <furquan@google.com>
---
M src/southbridge/intel/common/firmware/Kconfig
M src/southbridge/intel/common/firmware/Makefile.inc
2 files changed, 25 insertions(+), 5 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/58083/9

To view, visit change 58083. To unsubscribe, or for help writing mail filters, visit settings.

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I78ab377e110610f9ef4d86a2b6eeb4113897df85
Gerrit-Change-Number: 58083
Gerrit-PatchSet: 9
Gerrit-Owner: Furquan Shaikh <furquan@google.com>
Gerrit-Reviewer: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Gerrit-Reviewer: Cliff Huang <cliff.huang@intel.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak@chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-Attention: Cliff Huang <cliff.huang@intel.com>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak@chromium.org>
Gerrit-Attention: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Gerrit-Attention: Patrick Rudolph <siro@das-labor.org>
Gerrit-MessageType: newpatchset