Attention is currently required from: Jérémy Compostella, Paul Menzel, Subrata Banik, Wonkyu Kim.
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5 comments:
Commit Message:
File src/cpu/x86/64bit/pt1G.S:
File src/cpu/x86/64bit/pt1G.S:
Patch Set #3, Line 4:
Page table attributes: WB, User+Supervisor, Present, Writeable, Accessed, Dirty
*/
missing leading space on line 4 and 5.
Done
File src/cpu/x86/Kconfig:
File src/cpu/x86/Kconfig:
Patch Set #3, Line 157:
Select this option to access above 4GiB pagetable using 1GiB pages, upto
512GiB, instead of the default access below 4GiB using 2MiB pages.
What about: […]
Done
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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Id569ae5b50abf5b72e4db33b5e4cd802399e76ec
Gerrit-Change-Number: 80088
Gerrit-PatchSet: 5
Gerrit-Owner: Ashish Kumar Mishra <ashish.k.mishra@intel.com>
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