Angel Pons submitted this change.
soc/intel/broadwell: Merge `device_nvs.asl` into `globalnvs.asl`
Tested with BUILD_TIMELESS=1, Purism Librem 13 v1 does not change.
Change-Id: If5f1feb0cd43fe1e0514b4e3fa766da60e2b7603
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46773
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
D src/soc/intel/broadwell/pch/acpi/device_nvs.asl
M src/soc/intel/broadwell/pch/acpi/globalnvs.asl
2 files changed, 32 insertions(+), 39 deletions(-)
diff --git a/src/soc/intel/broadwell/pch/acpi/device_nvs.asl b/src/soc/intel/broadwell/pch/acpi/device_nvs.asl
deleted file mode 100644
index 76cdafc..0000000
--- a/src/soc/intel/broadwell/pch/acpi/device_nvs.asl
+++ /dev/null
@@ -1,37 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* Device Enabled in ACPI Mode */
-
-S0EN, 8, // DMA Enable
-S1EN, 8, // I2C0 Enable
-S2EN, 8, // I2C1 Enable
-S3EN, 8, // SPI0 Enable
-S4EN, 8, // SPI1 Enable
-S5EN, 8, // UART0 Enable
-S6EN, 8, // UART1 Enable
-S7EN, 8, // SDIO Enable
-S8EN, 8, // ADSP Enable
-
-/* BAR 0 */
-
-S0B0, 32, // DMA BAR0
-S1B0, 32, // I2C0 BAR0
-S2B0, 32, // I2C1 BAR0
-S3B0, 32, // SPI0 BAR0
-S4B0, 32, // SPI1 BAR0
-S5B0, 32, // UART0 BAR0
-S6B0, 32, // UART1 BAR0
-S7B0, 32, // SDIO BAR0
-S8B0, 32, // ADSP BAR0
-
-/* BAR 1 */
-
-S0B1, 32, // DMA BAR1
-S1B1, 32, // I2C0 BAR1
-S2B1, 32, // I2C1 BAR1
-S3B1, 32, // SPI0 BAR1
-S4B1, 32, // SPI1 BAR1
-S5B1, 32, // UART0 BAR1
-S6B1, 32, // UART1 BAR1
-S7B1, 32, // SDIO BAR1
-S8B1, 32, // ADSP BAR1
diff --git a/src/soc/intel/broadwell/pch/acpi/globalnvs.asl b/src/soc/intel/broadwell/pch/acpi/globalnvs.asl
index 3c6c5f5..15f69dd 100644
--- a/src/soc/intel/broadwell/pch/acpi/globalnvs.asl
+++ b/src/soc/intel/broadwell/pch/acpi/globalnvs.asl
@@ -49,9 +49,39 @@
Offset (0x100),
#include <vendorcode/google/chromeos/acpi/gnvs.asl>
- /* Device specific */
Offset (0x1000),
- #include "device_nvs.asl"
+ /* Device enables in ACPI mode */
+ S0EN, 8, // DMA Enable
+ S1EN, 8, // I2C0 Enable
+ S2EN, 8, // I2C1 Enable
+ S3EN, 8, // SPI0 Enable
+ S4EN, 8, // SPI1 Enable
+ S5EN, 8, // UART0 Enable
+ S6EN, 8, // UART1 Enable
+ S7EN, 8, // SDIO Enable
+ S8EN, 8, // ADSP Enable
+
+ /* BAR 0 */
+ S0B0, 32, // DMA BAR0
+ S1B0, 32, // I2C0 BAR0
+ S2B0, 32, // I2C1 BAR0
+ S3B0, 32, // SPI0 BAR0
+ S4B0, 32, // SPI1 BAR0
+ S5B0, 32, // UART0 BAR0
+ S6B0, 32, // UART1 BAR0
+ S7B0, 32, // SDIO BAR0
+ S8B0, 32, // ADSP BAR0
+
+ /* BAR 1 */
+ S0B1, 32, // DMA BAR1
+ S1B1, 32, // I2C0 BAR1
+ S2B1, 32, // I2C1 BAR1
+ S3B1, 32, // SPI0 BAR1
+ S4B1, 32, // SPI1 BAR1
+ S5B1, 32, // UART0 BAR1
+ S6B1, 32, // UART1 BAR1
+ S7B1, 32, // SDIO BAR1
+ S8B1, 32, // ADSP BAR1
}
/* Set flag to enable USB charging in S3 */
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