Patrick Georgi submitted this change.

View Change

Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
soc/intel/skylake: Remove unused ICH memory reference

TEST=Build and boot EVE and Soraka to OS.

Change-Id: Ic7840ce264393b4a955f17b16f5e0f556e34a776
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38511
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/soc/intel/skylake/acpi/systemagent.asl
1 file changed, 0 insertions(+), 10 deletions(-)

diff --git a/src/soc/intel/skylake/acpi/systemagent.asl b/src/soc/intel/skylake/acpi/systemagent.asl
index 0857495..3902b93 100644
--- a/src/soc/intel/skylake/acpi/systemagent.asl
+++ b/src/soc/intel/skylake/acpi/systemagent.asl
@@ -292,19 +292,9 @@
*/
Memory32Fixed (ReadWrite, 0, 0, PCIX)

- /* MISC ICH TTT base address reserved for the
- * TxT module use.
- */
- Memory32Fixed (ReadWrite, 0xFED20000, 0x20000)
-
/* VTD engine memory range. */
Memory32Fixed (ReadOnly, VTD_BASE_ADDRESS, VTD_BASE_SIZE)

- /* MISC ICH. Check if the hard code meets the
- * real configuration.
- */
- Memory32Fixed (ReadWrite, 0xFED45000, 0x4B000, TPMM)
-
/* FLASH range */
Memory32Fixed (ReadOnly, 0, CONFIG_ROM_SIZE, FIOH)


To view, visit change 38511. To unsubscribe, or for help writing mail filters, visit settings.

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ic7840ce264393b4a955f17b16f5e0f556e34a776
Gerrit-Change-Number: 38511
Gerrit-PatchSet: 4
Gerrit-Owner: Subrata Banik <subrata.banik@intel.com>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: Subrata Banik <subrata.banik@intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: merged