Patrick Georgi submitted this change.

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Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
mb/google/brya: Add support for Hynix H9HCNNNBKMMLXR-NEE LP4x DRAM

BUG=b:178681161
TEST=abuild

Change-Id: Icccfa3d1659e6c74c14a7372ea39c749a5921c64
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50271
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
---
M src/mainboard/google/brya/variants/brya0/memory/Makefile.inc
M src/mainboard/google/brya/variants/brya0/memory/dram_id.generated.txt
M src/mainboard/google/brya/variants/brya0/memory/mem_list_variant.txt
3 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/google/brya/variants/brya0/memory/Makefile.inc b/src/mainboard/google/brya/variants/brya0/memory/Makefile.inc
index 03a38b2..b8229c4 100644
--- a/src/mainboard/google/brya/variants/brya0/memory/Makefile.inc
+++ b/src/mainboard/google/brya/variants/brya0/memory/Makefile.inc
@@ -2,4 +2,4 @@
## This is an auto-generated file. Do not edit!!

SPD_SOURCES =
-SPD_SOURCES += lp4x-spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:F
+SPD_SOURCES += lp4x-spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:F, H9HCNNNBKMMLXR-NEE
diff --git a/src/mainboard/google/brya/variants/brya0/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/brya0/memory/dram_id.generated.txt
index 93934ae..45b69ae 100644
--- a/src/mainboard/google/brya/variants/brya0/memory/dram_id.generated.txt
+++ b/src/mainboard/google/brya/variants/brya0/memory/dram_id.generated.txt
@@ -1,2 +1,3 @@
DRAM Part Name ID to assign
MT53E512M32D2NP-046 WT:F 0 (0000)
+H9HCNNNBKMMLXR-NEE 0 (0000)
diff --git a/src/mainboard/google/brya/variants/brya0/memory/mem_list_variant.txt b/src/mainboard/google/brya/variants/brya0/memory/mem_list_variant.txt
index fb014a3..5f83732 100644
--- a/src/mainboard/google/brya/variants/brya0/memory/mem_list_variant.txt
+++ b/src/mainboard/google/brya/variants/brya0/memory/mem_list_variant.txt
@@ -1 +1,2 @@
MT53E512M32D2NP-046 WT:F
+H9HCNNNBKMMLXR-NEE

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Icccfa3d1659e6c74c14a7372ea39c749a5921c64
Gerrit-Change-Number: 50271
Gerrit-PatchSet: 2
Gerrit-Owner: Tim Wawrzynczak <twawrzynczak@chromium.org>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra@intel.com>
Gerrit-Reviewer: Boris Mittelberg <bmbm@google.com>
Gerrit-Reviewer: Furquan Shaikh <furquan@google.com>
Gerrit-Reviewer: Martin Roth <martinroth@google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged