Xi Chen has uploaded this change for review.

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soc/mediatek/mt8192: Add Discrete sdparam configs

- H9HCNNNCPMMLXR-4GB
- K4UBE3D4AA-MGCR-4GB
- MT53E1G32D2-4GB
- H9HCNNNFAMMLXR-NEE-BYTE-MODE-8GB
- K4UCE3Q4AA-MGCR-BYTE-MODE-8GB
- MT53E2G32D4-8GB

Signed-off-by: Xi Chen <xixi.chen@mediatek.com>
Change-Id: Ie97ae6d980dbd53b9b1a912252dc125307f13ff8
---
M src/mainboard/google/asurada/sdram_configs.c
M src/mainboard/google/asurada/sdram_params/Makefile.inc
A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-H9HCNNNCPMMLXR-4GB.c
A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-BYTE-MODE-8GB.c
A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB.c
A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-K4UCE3Q4AA-MGCR-BYTE-MODE-8GB.c
A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT53E1G32D2-4GB.c
A src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT53E2G32D4-8GB.c
M src/soc/mediatek/mt8192/include/soc/dramc_param.h
9 files changed, 62 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/49298/1

diff --git a/src/mainboard/google/asurada/sdram_configs.c b/src/mainboard/google/asurada/sdram_configs.c
index acefada..ad11763 100644
--- a/src/mainboard/google/asurada/sdram_configs.c
+++ b/src/mainboard/google/asurada/sdram_configs.c
@@ -10,6 +10,12 @@
 	[1] = "sdram-lpddr4x-MT29VZZZAD8GQFSL-046-4GB",
 	[2] = "sdram-lpddr4x-KMDP6001DA-B425-4GB",
 	[3] = "sdram-lpddr4x-KMDV6001DA-B620-4GB",
+	[4] = "sdram-lpddr4x-H9HCNNNCPMMLXR-4GB",
+	[5] = "sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB",
+	[6] = "sdram-lpddr4x-MT53E1G32D2-4GB",
+	[7] = "sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-BYTE-MODE-8GB",
+	[8] = "sdram-lpddr4x-K4UCE3Q4AA-MGCR-BYTE-MODE-8GB",
+	[9] = "sdram-lpddr4x-MT53E2G32D4-8GB",
 };
 
 static struct sdram_info params;
diff --git a/src/mainboard/google/asurada/sdram_params/Makefile.inc b/src/mainboard/google/asurada/sdram_params/Makefile.inc
index 7a591f4..8d52290 100644
--- a/src/mainboard/google/asurada/sdram_params/Makefile.inc
+++ b/src/mainboard/google/asurada/sdram_params/Makefile.inc
@@ -3,6 +3,12 @@
 sdram-params += sdram-lpddr4x-MT29VZZZAD8GQFSL-046-4GB
 sdram-params += sdram-lpddr4x-KMDP6001DA-B425-4GB
 sdram-params += sdram-lpddr4x-KMDV6001DA-B620-4GB
+sdram-params += sdram-lpddr4x-H9HCNNNCPMMLXR-4GB
+sdram-params += sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB
+sdram-params += sdram-lpddr4x-MT53E1G32D2-4GB
+sdram-params += sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-BYTE-MODE-8GB
+sdram-params += sdram-lpddr4x-K4UCE3Q4AA-MGCR-BYTE-MODE-8GB
+sdram-params += sdram-lpddr4x-MT53E2G32D4-8GB
 
 $(foreach params,$(sdram-params), \
 	$(eval cbfs-files-y += $(params)) \
diff --git a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-H9HCNNNCPMMLXR-4GB.c b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-H9HCNNNCPMMLXR-4GB.c
new file mode 100644
index 0000000..5735df5
--- /dev/null
+++ b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-H9HCNNNCPMMLXR-4GB.c
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+struct sdram_info params = {
+	.ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2,
+	.ddr_type = DDR_TYPE_DISCRETE,
+};
diff --git a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-BYTE-MODE-8GB.c b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-BYTE-MODE-8GB.c
new file mode 100644
index 0000000..51e8a6f
--- /dev/null
+++ b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-H9HCNNNFAMMLXR-NEE-BYTE-MODE-8GB.c
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+struct sdram_info params = {
+	.ddr_geometry = DDR_TYPE_2CH_2RK_8GB_4_4_BYTE,
+	.ddr_type = DDR_TYPE_DISCRETE,
+};
diff --git a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB.c b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB.c
new file mode 100644
index 0000000..5735df5
--- /dev/null
+++ b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-K4UBE3D4AA-MGCR-4GB.c
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+struct sdram_info params = {
+	.ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2,
+	.ddr_type = DDR_TYPE_DISCRETE,
+};
diff --git a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-K4UCE3Q4AA-MGCR-BYTE-MODE-8GB.c b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-K4UCE3Q4AA-MGCR-BYTE-MODE-8GB.c
new file mode 100644
index 0000000..51e8a6f
--- /dev/null
+++ b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-K4UCE3Q4AA-MGCR-BYTE-MODE-8GB.c
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+struct sdram_info params = {
+	.ddr_geometry = DDR_TYPE_2CH_2RK_8GB_4_4_BYTE,
+	.ddr_type = DDR_TYPE_DISCRETE,
+};
diff --git a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT53E1G32D2-4GB.c b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT53E1G32D2-4GB.c
new file mode 100644
index 0000000..aef8512
--- /dev/null
+++ b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT53E1G32D2-4GB.c
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+struct sdram_info params = {
+	.ddr_geometry = DDR_TYPE_2CH_1RK_4GB_4_0,
+	.ddr_type = DDR_TYPE_DISCRETE,
+};
diff --git a/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT53E2G32D4-8GB.c b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT53E2G32D4-8GB.c
new file mode 100644
index 0000000..3d12588
--- /dev/null
+++ b/src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT53E2G32D4-8GB.c
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+struct sdram_info params = {
+	.ddr_geometry = DDR_TYPE_2CH_2RK_8GB_4_4,
+	.ddr_type = DDR_TYPE_DISCRETE,
+};
diff --git a/src/soc/mediatek/mt8192/include/soc/dramc_param.h b/src/soc/mediatek/mt8192/include/soc/dramc_param.h
index 30ac4d4..0b67bed 100644
--- a/src/soc/mediatek/mt8192/include/soc/dramc_param.h
+++ b/src/soc/mediatek/mt8192/include/soc/dramc_param.h
@@ -43,9 +43,10 @@
 enum DRAMC_PARAM_GEOMETRY_TYPE {
 	DDR_TYPE_2CH_2RK_4GB_2_2,
 	DDR_TYPE_2CH_2RK_6GB_3_3,
-	DDR_TYPE_2CH_2RK_8GB_4_4,
+	DDR_TYPE_2CH_2RK_8GB_4_4_BYTE,
 	DDR_TYPE_2CH_1RK_4GB_4_0,
 	DDR_TYPE_2CH_2RK_6GB_2_4,
+	DDR_TYPE_2CH_2RK_8GB_4_4,
 };
 
 enum DRAM_PARAM_VOLTAGE_TYPE {

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