Arthur Heymans uploaded patch set #2 to this change.

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cpu/intel/common: Compute the TSC tick freq based on FSB

This allows the cbmem utility to compute timestamps based on coreboot
tables without relying on other userspace components.

Change-Id: Ie87adec950dc51f4f873c0d852a325b3ff9b18bf
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/cpu/intel/speedstep/speedstep.c
1 file changed, 26 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/31203/2

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ie87adec950dc51f4f873c0d852a325b3ff9b18bf
Gerrit-Change-Number: 31203
Gerrit-PatchSet: 2
Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: newpatchset