Attention is currently required from: Arthur Heymans, Subrata Banik, Wonkyu Kim.

Appukuttan V K uploaded patch set #13 to this change.

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The following approvals got outdated and were removed: Code-Review+1 by Subrata Banik, Code-Review+1 by Wonkyu Kim, Verified+1 by build bot (Jenkins)

drivers/intel/fsp2_0: Make coreboot FSP stack 16-bytes aligned

- Stack alignment:

  1. FSP functions must be called with the stack 16-bytes aligned
     in x86_64 mode.This is already setup properly with the default
     value of the `mpreferred-stack-boundary' compiler option (4).
     Similarly for x86_32 it is set to 2 through compiler option.

  2. The FSP heap buffer supplied by coreboot through the `StackBase'
     UPD must be 16-bytes aligned for x86_64 and 4-bytes aligned for
     x86_32.

BUG=b:329034258
TEST=Verified on Meteor Lake board (Rex)

Change-Id: I86048c5d3623a29f17a5e492cd67568e4844589c
Signed-off-by: Appukuttan V K <appukuttan.vk@intel.com>
---
M src/drivers/intel/fsp2_0/memory_init.c
1 file changed, 5 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/81661/13

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