Arthur Heymans has uploaded this change for review.
mb/asrock/g41c-gs: Add decode range for Environment Controller
This seems to have been forgotten in the original patch which added
the Asrock G41C-GS R2.0, but all variants have a similar SuperIO and
set the Environment Controller IO decode address to the same value.
TEST: see if the Linux module w832627dhg can properly read the
sensors fan/temp/etc... (currently not further configured so values
could be garbage).
Change-Id: Ibff3dffaf0f5c32c3b12336a23839dee501e7160
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/mainboard/asrock/g41c-gs/romstage.c
1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/23048/1
diff --git a/src/mainboard/asrock/g41c-gs/romstage.c b/src/mainboard/asrock/g41c-gs/romstage.c
index 07edfb4..9acf6c1 100644
--- a/src/mainboard/asrock/g41c-gs/romstage.c
+++ b/src/mainboard/asrock/g41c-gs/romstage.c
@@ -82,6 +82,8 @@
/* Decode range */
pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_EN, CNF1_LPC_EN
| KBC_LPC_EN | LPT_LPC_EN | COMA_LPC_EN);
+ /* GEN1_DEC Enable IO range 0x290-29c */
+ pci_write_config32(LPC_DEV, 0x84 , 0x000c0290);
}
void mainboard_romstage_entry(unsigned long bist)
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