Arthur Heymans submitted this change.

View Change

sb/intel/ibexpeak: Don't clear PMBASE regs in romstage

X201 boots fine without it.

Change-Id: I20a8e598b07bf0a059dcb47651d1a26456863673
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35769
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/mainboard/lenovo/x201/romstage.c
M src/mainboard/packardbell/ms2290/romstage.c
2 files changed, 0 insertions(+), 66 deletions(-)

diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c
index 010ab86..65abc36 100644
--- a/src/mainboard/lenovo/x201/romstage.c
+++ b/src/mainboard/lenovo/x201/romstage.c
@@ -94,21 +94,6 @@
 	early_usb_init(mainboard_usb_ports);
 }
 
-static inline void write_acpi32(u32 addr, u32 val)
-{
-	outl(val, DEFAULT_PMBASE | addr);
-}
-
-static inline void write_acpi16(u32 addr, u16 val)
-{
-	outw(val, DEFAULT_PMBASE | addr);
-}
-
-static inline u32 read_acpi32(u32 addr)
-{
-	return inl(DEFAULT_PMBASE | addr);
-}
-
 static void set_fsb_frequency(void)
 {
 	u8 block[5];
@@ -179,20 +164,6 @@
 	outb(0x50, 0x15ec);
 	outb(inb(0x15ee) & 0x70, 0x15ee);
 
-	write_acpi16(0x2, 0x0);
-	write_acpi32(0x28, 0x0);
-	write_acpi32(0x2c, 0x0);
-	if (!s3resume) {
-		read_acpi32(0x4);
-		read_acpi32(0x20);
-		read_acpi32(0x34);
-		write_acpi16(0x0, 0x900);
-		write_acpi32(0x20, 0xffff7ffe);
-		write_acpi32(0x34, 0x56974);
-		pci_write_config8(PCH_LPC_DEV, GEN_PMCON_3,
-				  pci_read_config8(PCH_LPC_DEV, GEN_PMCON_3) | 2);
-	}
-
 	early_thermal_init();
 
 	timestamp_add_now(TS_BEFORE_INITRAM);
diff --git a/src/mainboard/packardbell/ms2290/romstage.c b/src/mainboard/packardbell/ms2290/romstage.c
index 2aeee1e..6cee711 100644
--- a/src/mainboard/packardbell/ms2290/romstage.c
+++ b/src/mainboard/packardbell/ms2290/romstage.c
@@ -90,29 +90,6 @@
 	early_usb_init(mainboard_usb_ports);
 }
 
-static inline void write_acpi32(u32 addr, u32 val)
-{
-	outl(val, DEFAULT_PMBASE | addr);
-}
-
-static inline void write_acpi16(u32 addr, u16 val)
-{
-	outw(val, DEFAULT_PMBASE | addr);
-}
-
-static inline u32 read_acpi32(u32 addr)
-{
-	return inl(DEFAULT_PMBASE | addr);
-}
-
-// unused func - used for RE
-#if 0
-static inline u16 read_acpi16(u32 addr)
-{
-	return inw(DEFAULT_PMBASE | addr);
-}
-#endif
-
 void mainboard_romstage_entry(void)
 {
 	u32 reg32;
@@ -168,20 +145,6 @@
 	/* Enable SMBUS. */
 	enable_smbus();
 
-	write_acpi16(0x2, 0x0);
-	write_acpi32(0x28, 0x0);
-	write_acpi32(0x2c, 0x0);
-	if (!s3resume) {
-		read_acpi32(0x4);
-		read_acpi32(0x20);
-		read_acpi32(0x34);
-		write_acpi16(0x0, 0x900);
-		write_acpi32(0x20, 0xffff7ffe);
-		write_acpi32(0x34, 0x56974);
-		pci_write_config8(PCH_LPC_DEV, GEN_PMCON_3,
-				  pci_read_config8(PCH_LPC_DEV, GEN_PMCON_3) | 2);
-	}
-
 	early_thermal_init();
 
 	timestamp_add_now(TS_BEFORE_INITRAM);

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