[coreboot-gerrit] Change in coreboot[master]: soc/intel/tigerlake: update elog to include CSME reset causes

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41026 )

Change subject: soc/intel/tigerlake: update elog to include CSME reset causes
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Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/41026/1/src/soc/intel/tigerlake/elo... 
File src/soc/intel/tigerlake/elog.c:

https://review.coreboot.org/c/coreboot/+/41026/1/src/soc/intel/tigerlake/elo... 
PS1, Line 66: ps->hpr_cause0
> is there a reason not to log the entire cause register?

The others are far less interesting... they include SMBUS or eSPI slaves causing a reset, SYS_RESET# 0xCF9 writes, and the TCO watchdog expiring the 2nd time. I imagine it will be useful for helping to debug CB:35403 and friends once we've gotten further along with that functionality.