10 comments:
File src/soc/intel/alderlake/chip.h:
Patch Set #9, Line 122: struct {
SG! Let me try this.
Done
File src/soc/intel/alderlake/chip.h:
Patch Set #1, Line 126: PcieRp
make it lowercase ?
Done
File src/soc/intel/alderlake/romstage/fsp_params.c:
Patch Set #1, Line 48: PcieRp[i].clksrc
I hope it can use like this in devicetree. Need to try though... […]
Done
File src/soc/intel/alderlake/romstage/fsp_params.c:
Patch Set #2, Line 48: config->PcieClkSrcUsage[PcieRp[i].clksrc] = i;
This may not use for it root port. Need to redefine it.. hmmm..
Ack
File src/soc/intel/alderlake/romstage/fsp_params.c:
`PCIE_CLK_NOTUSED`
Done
Patch Set #9, Line 31: /* Back up special usage */
This is not required.
Done
PCIE_CLK_NOTUSED
Done
Patch Set #9, Line 40: config->PcieRp[i].clkreq
Let us use enums :p I like this way.
Done
Patch Set #9, Line 40: PcieClkSrcClkReq
You don't need to set this in a local array. It can directly be set in m_cfg->PcieClkSrcClkReq. […]
Done
Let's not do this. Instead let's ensure that mainboard sets it correctly.
Done
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