2 comments:
File src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld:
Patch Set #2, Line 32: * | |X86_RESET_VECTOR = ROMSTAGE_ADDR + ROMSTAGE_SIZE - 0x10
the reset vector isn't in romstage, but in bootblock, so this is wrong. […]
Yes, this comment needs update. It was from back when romstage was the first stage to start on x86 (changes were only in chromium tree, but while porting to upstream, the comment wasn't fixed).
Patch Set #2, Line 86: _ = ASSERT(CONFIG_BOOTBLOCK_ADDR == ((CONFIG_BOOTBLOCK_ADDR + 0xFFFF) & 0xFFFF0000), "Bootblock must be 16 bit aligned");
not 100% certain on this and couldn't find a definite answer at the places i thought it was most lik […]
Seems to be coming from: https://review.coreboot.org/c/coreboot/+/42885
+Raul.
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