EricR Lai uploaded patch set #8 to this change.

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soc/intel/alderlake: Revise PCIE port config

PCIE ClkSrcUsage and ClkSrcClkReq are always confusing in devicetree.
Make it easier to just fill the number from schematics.

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I0b390e43f8e99b19cfad178139b86a2f77d7a57b
---
M src/mainboard/google/brya/variants/baseboard/devicetree.cb
M src/mainboard/intel/adlrvp/devicetree.cb
M src/soc/intel/alderlake/chip.h
M src/soc/intel/alderlake/romstage/fsp_params.c
4 files changed, 73 insertions(+), 32 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/48340/8

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