Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held.

Raul Rangel has uploaded this change for review.

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soc/amd/cezanne: Disable CONSOLE_CBMEM_PRINT_PRE_BOOTBLOCK_CONTENTS

Now that PSP verstage can directly write to the UART, we no longer need
to manually dump the cbmem contents.

Ideally if we can get picasso to add support for mapping the UART, or
if we implement bit banging we can delete this functionality
completely.

BUG=b:215599230
TEST=Boot guybrush and verify verstage logs aren't printed twice

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Id70b24625c3b2f3d6fe470cf227a0083f5b974f9
---
M src/soc/amd/cezanne/Kconfig
1 file changed, 0 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/61611/1
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index 620c650..d26192a 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -16,7 +16,6 @@
select ARCH_RAMSTAGE_X86_32
select ARCH_X86
select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
- select CONSOLE_CBMEM_PRINT_PRE_BOOTBLOCK_CONTENTS if VBOOT_STARTS_BEFORE_BOOTBLOCK
select DRIVERS_USB_ACPI
select DRIVERS_I2C_DESIGNWARE
select DRIVERS_USB_PCI_XHCI

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Id70b24625c3b2f3d6fe470cf227a0083f5b974f9
Gerrit-Change-Number: 61611
Gerrit-PatchSet: 1
Gerrit-Owner: Raul Rangel <rrangel@chromium.org>
Gerrit-Reviewer: Felix Held <felix-coreboot@felixheld.de>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk@gmail.com>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd@gmail.com>
Gerrit-Attention: Jason Glenesk <jason.glenesk@gmail.com>
Gerrit-Attention: Marshall Dawson <marshalldawson3rd@gmail.com>
Gerrit-Attention: Felix Held <felix-coreboot@felixheld.de>
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