2 comments:
File src/soc/amd/common/block/lpc/lpc_util.c:
Patch Set #4, Line 40: TOTAL_WIDEIO_PORTS
It looks like that went in here https://review.coreboot. […]
Yes, that is correct. I could have used wio_io_en[] and get the number of total wide IO from the structure number of elements... but this way makes the intention clear. At the time I created it, it was intended to stoneyridge only, but now Marshall is moving it to common.
However, as Marshall mentioned, it has not changed for a while and might not change in the future. So far the max I have ever seen used were 2 wide IO registers, and I don't believe AMD will need to change that number any time soon.
File src/soc/amd/stoneyridge/southbridge.c:
Patch Set #6, Line 230: STONEYRIDGE_LEGACY_FREE
Why dependency on legacy free? Couldn't we have a legacy board using external SIO?
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