Attention is currently required from: Jeremy Soller, Michał Żygowski, Piotr Król, Sean Rhodes, Tim Crawford.
Elyes Haouas has uploaded this change for review.
tree: Use eist_enable as bool for newly merged files
Change-Id: Icc01852dc5bd04cfa151e8fa7c5bcc160ed978c6
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
---
M src/mainboard/protectli/vault_adl_p/devicetree.cb
M src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb
M src/mainboard/system76/mtl/devicetree.cb
3 files changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/84156/1
diff --git a/src/mainboard/protectli/vault_adl_p/devicetree.cb b/src/mainboard/protectli/vault_adl_p/devicetree.cb
index c2959f0..7cccc30 100644
--- a/src/mainboard/protectli/vault_adl_p/devicetree.cb
+++ b/src/mainboard/protectli/vault_adl_p/devicetree.cb
@@ -1,7 +1,7 @@
chip soc/intel/alderlake
# FSP configuration
- register "eist_enable" = "1"
+ register "eist_enable" = "true"
# Sagv Configuration
register "sagv" = "SaGv_Enabled"
diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb b/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb
index 010567a..fc69a9c 100644
--- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb
+++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb
@@ -13,7 +13,7 @@
register "sagv" = "SaGv_Enabled"
# FSP Silicon
- register "eist_enable" = "1"
+ register "eist_enable" = "true"
register "cnvi_bt_core" = "true"
register "cnvi_bt_audio_offload" = "true"
diff --git a/src/mainboard/system76/mtl/devicetree.cb b/src/mainboard/system76/mtl/devicetree.cb
index 9a4cfb4..0bd6721 100644
--- a/src/mainboard/system76/mtl/devicetree.cb
+++ b/src/mainboard/system76/mtl/devicetree.cb
@@ -11,7 +11,7 @@
}"
# Enable Enhanced Intel SpeedStep
- register "eist_enable" = "1"
+ register "eist_enable" = "true"
# Thermal
register "tcc_offset" = "8"
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