Arthur Heymans uploaded patch set #3 to this change.

View Change

nb/amd/agesa: select ROMSTAGE_CACHED_CBMEM

AGESA sets up MTRR's to cache the whole dram, so decompressing
postcar stage to cbmem should be fast and is now selected by
default.

Change-Id: I62ffe1bd646e9ddad77be240f030601790f4da4b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/northbridge/amd/agesa/family14/Kconfig
M src/northbridge/amd/agesa/family15tn/Kconfig
M src/northbridge/amd/agesa/family16kb/Kconfig
3 files changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/37198/3

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