Patch Set 2: Code-Review-1

What's the status of this CL? I still think that this is the wrong way to go about this problem. From my understanding of b/153593670, we were still hoping for AMD to change the cache settings for memory-mapped ROM, and if that's impossible we'd prefer to handle this with a platform-specific boot_device rdev. We shouldn't be hacking up common code for it.

AMD has been very resistant to enabling caching of the spi rom. I need to get this running at coreboot.org so we can switch over. I'll come up with a different solution.

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