Attention is currently required from: Nico Huber.
Patch set 5:Code-Review -1
1 comment:
Commit Message:
making its state equal with the HeciEnabled
option
Should we? It depends on the point in coreboot when `HeciEnabled` […]
Just looked it after. It happens while `soc_finalize()`, after PCI enumeration. I thought `HeciEnabled` would set a FSP UPD. So I will leave it as it is.
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