Felix Held submitted this change.
cpu/x86/lapic: Only deliver ExtINT to BSP
ExtINT is related to external PIC mode i8259 interrupts,
they should be delivered to one CPU (BSP) only.
Change-Id: I78490d2cbe3d9f52e10ef2471508263fd6c146ba
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42434
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
---
M src/cpu/x86/lapic/lapic.c
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/cpu/x86/lapic/lapic.c b/src/cpu/x86/lapic/lapic.c
index 58e4524..b4d3c4d 100644
--- a/src/cpu/x86/lapic/lapic.c
+++ b/src/cpu/x86/lapic/lapic.c
@@ -5,6 +5,7 @@
#include <cpu/x86/lapic_def.h>
#include <cpu/x86/msr.h>
#include <console/console.h>
+#include <smp/node.h>
#include <stdint.h>
void enable_lapic(void)
@@ -55,7 +56,11 @@
uint32_t mask = LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | LAPIC_INPUT_POLARITY |
LAPIC_DELIVERY_MODE_MASK;
- lapic_update32(LAPIC_LVT0, ~mask, LAPIC_DELIVERY_MODE_EXTINT);
+ if (boot_cpu())
+ lapic_update32(LAPIC_LVT0, ~mask, LAPIC_DELIVERY_MODE_EXTINT);
+ else
+ lapic_update32(LAPIC_LVT0, ~mask, LAPIC_LVT_MASKED |
+ LAPIC_DELIVERY_MODE_EXTINT);
lapic_update32(LAPIC_LVT1, ~mask, LAPIC_DELIVERY_MODE_NMI);
}
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