Arthur Heymans (arthur@aheymans.xyz) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15492
-gerrit
commit c94e51ae02e859e700be6640eea74791f1a5f2bd Author: Arthur Heymans arthur@aheymans.xyz Date: Sat Jun 18 21:52:30 2016 +0200
x4x: make preallocated IGD memory a cmos option
This allows to set the preallocated memory for the IGD on x4x using a cmos option. If no cmos option is found a default value of 64M is used.
Change-Id: I9051d080be82f6dfab37d353252e29b2ed1fca7f Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- src/northbridge/intel/x4x/early_init.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c index b522293..a430538 100644 --- a/src/northbridge/intel/x4x/early_init.c +++ b/src/northbridge/intel/x4x/early_init.c @@ -18,6 +18,7 @@ #include <arch/io.h> #include "iomap.h" #include <southbridge/intel/i82801gx/i82801gx.h> /* DEFAULT_PMBASE */ +#include <pc80/mc146818rtc.h> #include "x4x.h"
void x4x_early_init(void) @@ -51,5 +52,12 @@ void x4x_early_init(void)
/* Enable internal GFX */ pci_write_config32(d0f0, D0F0_DEVEN, BOARD_DEVEN); - pci_write_config16(d0f0, D0F0_GGC, 0x0170); + /* Set preallocated IGD size from cmos */ + u8 gfxsize; + + if (get_option(&gfxsize, "gfx_uma_size") != CB_SUCCESS) { + /* 6 for 64MB, default if not set in cmos */ + gfxsize = 6; + } + pci_write_config16(d0f0, D0F0_GGC, 0x0100 | ((gfxsize + 1) << 4)); }