Patrick Georgi submitted this change.

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Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Michael Niewöhner: Looks good to me, but someone else must approve
soc/intel/denverton_ns: Allow using FSP repo

This commit is adding a dependency check for the FSP_USE_REPO
config option which so far was not able to deal with Denverton
systems.

Change-Id: I615305da5865bef305f560f5c90482cf0937b25a
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Signed-off-by: Johanna Schander <coreboot@mimoja.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30931
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner
---
M src/drivers/intel/fsp2_0/Kconfig
M src/soc/intel/denverton_ns/Kconfig
M src/soc/intel/denverton_ns/Makefile.inc
3 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index 2d45343..2624644 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -55,7 +55,8 @@
depends on ADD_FSP_BINARIES
depends on SOC_INTEL_APOLLOLAKE || SOC_INTEL_SKYLAKE || \
SOC_INTEL_KABYLAKE || SOC_INTEL_COFFEELAKE || \
- SOC_INTEL_ICELAKE || SOC_INTEL_WHISKEYLAKE
+ SOC_INTEL_ICELAKE || SOC_INTEL_WHISKEYLAKE || \
+ SOC_INTEL_DENVERTON_NS
help
When selecting this option, the SoC must set FSP_HEADER_PATH
and FSP_FD_PATH correctly so FSP splitting works.
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index 9a61127..a74250b 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -79,6 +79,15 @@
help
The memory location of the Intel FSP-S binary for this platform.

+config FSP_HEADER_PATH
+ string
+ default "3rdparty/fsp/DenvertonNSFspBinPkg/Include/"
+
+config FSP_FD_PATH
+ string
+ depends on FSP_USE_REPO
+ default "3rdparty/fsp/DenvertonNSFspBinPkg/FspBin/DenvertonNSFsp.fd"
+
# CAR memory layout on DENVERTON_NS hardware:
## CAR base address - 0xfef00000
## CAR size 1MB - 0x100 (0xfff00)
diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc
index 4050f61..7529892 100644
--- a/src/soc/intel/denverton_ns/Makefile.inc
+++ b/src/soc/intel/denverton_ns/Makefile.inc
@@ -86,10 +86,8 @@
verstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart_debug.c

CPPFLAGS_common += -I$(src)/soc/intel/denverton_ns/include
-CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/denverton_ns

##Set FSP binary blobs memory location
-
$(call strip_quotes,$(CONFIG_FSP_T_CBFS))-options := -b $(CONFIG_FSP_T_ADDR) --xip
$(call strip_quotes,$(CONFIG_FSP_M_CBFS))-options := -b $(CONFIG_FSP_M_ADDR) --xip
$(call strip_quotes,$(CONFIG_FSP_S_CBFS))-options := -b $(CONFIG_FSP_S_ADDR) --xip

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I615305da5865bef305f560f5c90482cf0937b25a
Gerrit-Change-Number: 30931
Gerrit-PatchSet: 13
Gerrit-Owner: Felix Singer <felixsinger@posteo.net>
Gerrit-Reviewer: Felix Singer <felixsinger@posteo.net>
Gerrit-Reviewer: Andrey Petrov <andrey.petrov@gmail.com>
Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: David Guckian
Gerrit-Reviewer: David Guckian <david.guckian@intel.com>
Gerrit-Reviewer: Julien Viard de Galbert <coreboot-review-ju@vdg.name>
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Gerrit-Reviewer: Michael Niewöhner
Gerrit-Reviewer: Mimoja <coreboot@mimoja.de>
Gerrit-Reviewer: Nico Huber <nico.h@gmx.de>
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph@9elements.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio@intel.com>
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Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
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Gerrit-MessageType: merged