[coreboot-gerrit] [M] Change in coreboot[master]: soc/intel/{adl,tgl,jsl}: Add smihandler_soc_disable_busmaster

[Nico Huber (Code Review)]

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52873 )

Change subject: soc/intel/{adl,tgl,jsl}: Add smihandler_soc_disable_busmaster
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Patch Set 7:

(1 comment)

Patchset:

PS7: 
This is quite interesting. Is it a silicon bug, i.e. it really disables
i/o if the bus master bit is cleared? Or does the PMC actually need bus
master requests to do what the i/o triggers?