Felix Held submitted this change.

View Change

Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Nikolai Vyssotski: Looks good to me, but someone else must approve
amdfwtool: Take a config file instead of command line parameters

To verify the consistency, see if timeless builds with and without
this patch result in identical coreboot.rom files.

BUG=b:154032833
TEST=Build & boot on mandolin

Change-Id: Icae73d0730106aab687486e555ba947796e5e757
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42859
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
---
M src/soc/amd/picasso/Kconfig
M src/soc/amd/picasso/Makefile.inc
A src/soc/amd/picasso/fw.cfg
M src/soc/amd/stoneyridge/Kconfig
M src/soc/amd/stoneyridge/Makefile.inc
A src/soc/amd/stoneyridge/fw_cz.cfg
A src/soc/amd/stoneyridge/fw_st.cfg
M src/southbridge/amd/pi/hudson/Kconfig
M src/southbridge/amd/pi/hudson/Makefile.inc
A src/southbridge/amd/pi/hudson/fw_avl.cfg
M util/amdfwtool/Makefile
M util/amdfwtool/Makefile.inc
M util/amdfwtool/amdfwtool.c
A util/amdfwtool/amdfwtool.h
A util/amdfwtool/data_parse.c
15 files changed, 786 insertions(+), 559 deletions(-)

diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 6a5b932..7e03a41 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -446,9 +446,9 @@
comment "AMD Firmware Directory Table set to location for 16MB ROM"
depends on AMD_FWM_POSITION_INDEX = 5

-config AMD_PUBKEY_FILE
+config AMDFW_CONFIG_FILE
string
- default "3rdparty/amd_blobs/picasso/PSP/AmdPubKeyRV.bin"
+ default "src/soc/amd/picasso/fw.cfg"

config USE_PSPSECUREOS
bool
@@ -487,16 +487,6 @@
depends on HAVE_PSP_WHITELIST_FILE
default "3rdparty/amd_blobs/picasso/PSP/wtl-rvn.sbin"

-config PSP_BOOTLOADER_FILE
- string "Specify the PSP Bootloader file path"
- default "3rdparty/amd_blobs/picasso/PSP/PspBootLoader_WL_RV.sbin" if HAVE_PSP_WHITELIST_FILE
- default "3rdparty/amd_blobs/picasso/PSP/PspBootLoader_prod_RV.sbin"
- help
- Supply the name of the PSP bootloader file.
-
- Note that this option may conflict with the whitelist file if a
- different PSP bootloader binary is specified.
-
config PSP_SHAREDMEM_SIZE
hex "Maximum size of shared memory area"
default 0x3000 if VBOOT
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc
index 514b313..7ec695a 100644
--- a/src/soc/amd/picasso/Makefile.inc
+++ b/src/soc/amd/picasso/Makefile.inc
@@ -125,77 +125,35 @@
# Design Guide for AMD Family 17h Processors" (PID #55758, NDA only).
#

-# type = 0x0
-FIRMWARE_LOCATE=$(realpath $(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE))))
-
-# type = 0x1
-ifeq ($(CONFIG_PSP_BOOTLOADER_FILE),)
-$(error CONFIG_PSP_BOOTLOADER_FILE was not defined)
-endif
-PSPBTLDR_FILE=$(realpath $(call strip_quotes, $(CONFIG_PSP_BOOTLOADER_FILE)))
-$(info Adding PSP $(shell dd if=$(PSPBTLDR_FILE) | md5sum))
-
-# types = 0x8 and 0x12
-PSP_SMUFW1_SUB1_FILE=$(FIRMWARE_LOCATE)/SmuFirmwareRV2.csbin
-PSP_SMUFW1_SUB2_FILE=$(FIRMWARE_LOCATE)/SmuFirmwarePCO.csbin
-PSP_SMUFW2_SUB1_FILE=$(FIRMWARE_LOCATE)/SmuFirmware2RV2.csbin
-PSP_SMUFW2_SUB2_FILE=$(FIRMWARE_LOCATE)/SmuFirmware2PCO.csbin
+FIRMWARE_LOCATE=$(shell grep -e FIRMWARE_LOCATE $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}')

ifeq ($(CONFIG_PSP_UNLOCK_SECURE_DEBUG),y)
-# type = 0x9
-PSP_SEC_DBG_KEY_FILE=$(FIRMWARE_LOCATE)/RavenSecureDebug_PublicKey.bin
-# type = 0x13
-PSP_SEC_DEBUG_FILE=$(FIRMWARE_LOCATE)/secure_unlock_prod_RV.sbin
# Enable secure debug unlock
PSP_SOFTFUSE_BITS += 0
-PSP_TOKEN_UNLOCK="--token-unlock"
+OPT_TOKEN_UNLOCK="--token-unlock"
endif

ifeq ($(CONFIG_USE_PSPSECUREOS),y)
# types = 0x2
-PSPSECUREOS_FILE=$(FIRMWARE_LOCATE)/psp_os_combined_prod_RV.sbin
+OPT_PSP_USE_PSPSECUREOS="--use-pspsecureos"
endif

-# type = 0x21
-PSP_IKEK_FILE=$(FIRMWARE_LOCATE)/PspIkekRV.bin
-
-# type = 0x24
-PSP_SECG1_FILE=$(FIRMWARE_LOCATE)/security_policy_RV2_FP5_AM4.sbin
-PSP_SECG2_FILE=$(FIRMWARE_LOCATE)/security_policy_PCO_FP5_AM4.sbin

ifeq ($(CONFIG_PSP_LOAD_MP2_FW),y)
-# type = 0x25
-PSP_MP2FW1_FILE=$(FIRMWARE_LOCATE)/MP2I2CFWRV2.sbin
-PSP_MP2FW2_FILE=$(FIRMWARE_LOCATE)/MP2I2CFWPCO.sbin
-# BIOS type = 0x6a
-PSP_MP2CFG_FILE=$(FIRMWARE_LOCATE)/MP2FWConfig.sbin
+OPT_PSP_LOAD_MP2_FW="--load-mp2-fw"
else
# Disable MP2 firmware loading
PSP_SOFTFUSE_BITS += 29
endif

-# type = 0x28
-PSP_DRIVERS_FILE=$(FIRMWARE_LOCATE)/drv_sys_prod_RV.sbin
-
ifeq ($(CONFIG_PSP_LOAD_S0I3_FW),y)
-PSP_S0I3_FILE=$(FIRMWARE_LOCATE)/dr_agesa_prod_RV.sbin
+OPT_PSP_LOAD_S0I3_FW="--load-s0i3"
endif

-# types = 0x30 - 0x37
-PSP_ABL0_FILE=$(FIRMWARE_LOCATE)/AgesaBootloader0_prod_RV.csbin
-PSP_ABL1_FILE=$(FIRMWARE_LOCATE)/AgesaBootloader1_prod_RV.csbin
-PSP_ABL2_FILE=$(FIRMWARE_LOCATE)/AgesaBootloader2_prod_RV.csbin
-PSP_ABL3_FILE=$(FIRMWARE_LOCATE)/AgesaBootloader3_prod_RV.csbin
-PSP_ABL4_FILE=$(FIRMWARE_LOCATE)/AgesaBootloader4_prod_RV.csbin
-PSP_ABL5_FILE=$(FIRMWARE_LOCATE)/AgesaBootloader5_prod_RV.csbin
-PSP_ABL6_FILE=$(FIRMWARE_LOCATE)/AgesaBootloader6_prod_RV.csbin
-PSP_ABL7_FILE=$(FIRMWARE_LOCATE)/AgesaBootloader7_prod_RV.csbin
-
# type = 0x3a
ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y)
PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE)
endif
-
#
# BIOS Directory Table items - proper ordering is managed by amdfwtool
#
@@ -216,16 +174,6 @@
APOB_NV_SIZE=$(shell grep "FMAP_SECTION_RW_MRC_CACHE_SIZE" $(obj)/fmap_config.h | awk '{print $$(NF)}')
APOB_NV_BASE=$(shell grep "FMAP_SECTION_RW_MRC_CACHE_START" $(obj)/fmap_config.h | awk '{print $$(NF)}')

-# type2 = 0x64, 0x65
-PSP_PMUI_FILE1=$(FIRMWARE_LOCATE)/Appb_Rv_1D_Ddr4_Udimm_Imem.csbin
-PSP_PMUI_FILE2=$(FIRMWARE_LOCATE)/Appb_Rv_2D_Ddr4_Imem.csbin
-PSP_PMUI_FILE3=$(FIRMWARE_LOCATE)/Appb_Rv2_1D_ddr4_Udimm_Imem.csbin
-PSP_PMUI_FILE4=$(FIRMWARE_LOCATE)/Appb_Rv2_2D_ddr4_Udimm_Imem.csbin
-PSP_PMUD_FILE1=$(FIRMWARE_LOCATE)/Appb_Rv_1D_Ddr4_Udimm_Dmem.csbin
-PSP_PMUD_FILE2=$(FIRMWARE_LOCATE)/Appb_Rv_2D_Ddr4_Dmem.csbin
-PSP_PMUD_FILE3=$(FIRMWARE_LOCATE)/Appb_Rv2_1D_ddr4_Udimm_Dmem.csbin
-PSP_PMUD_FILE4=$(FIRMWARE_LOCATE)/Appb_Rv2_2D_ddr4_Udimm_Dmem.csbin
-
# type = 0x66
PSP_UCODE_FILE1=$(FIRMWARE_LOCATE)/UcodePatch_PCO_B1.bin
PSP_UCODE_FILE2=$(FIRMWARE_LOCATE)/UcodePatch_PCO_B0.bin
@@ -259,33 +207,6 @@

add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )

-OPT_AMD_PUBKEY_FILE=$(call add_opt_prefix, $(CONFIG_AMD_PUBKEY_FILE), --pubkey)
-OPT_PSPBTLDR_FILE=$(call add_opt_prefix, $(PSPBTLDR_FILE), --bootloader)
-OPT_SMUFW1_SUB1_FILE=$(call add_opt_prefix, $(PSP_SMUFW1_SUB1_FILE), --subprogram 1 --smufirmware)
-OPT_SMUFW1_SUB2_FILE=$(call add_opt_prefix, $(PSP_SMUFW1_SUB2_FILE), --subprogram 2 --smufirmware)
-OPT_SMUFW2_SUB1_FILE=$(call add_opt_prefix, $(PSP_SMUFW2_SUB1_FILE), --subprogram 1 --smufirmware2)
-OPT_SMUFW2_SUB2_FILE=$(call add_opt_prefix, $(PSP_SMUFW2_SUB2_FILE), --subprogram 2 --smufirmware2)
-OPT_PSP_SEC_DBG_KEY_FILE=$(call add_opt_prefix, $(PSP_SEC_DBG_KEY_FILE), --securedebug)
-OPT_TOKEN_UNLOCK=$(call add_opt_prefix, $(PSP_TOKEN_UNLOCK), "")
-OPT_PSP_SOFTFUSE=$(call add_opt_prefix, $(PSP_SOFTFUSE), --soft-fuse)
-OPT_PSPSECUREOS_FILE=$(call add_opt_prefix, $(PSPSECUREOS_FILE), --secureos)
-OPT_SEC_DEBUG_FILE=$(call add_opt_prefix, $(PSP_SEC_DEBUG_FILE), --secdebug)
-OPT_IKEK_FILE=$(call add_opt_prefix, $(PSP_IKEK_FILE), --ikek)
-OPT_SECG1_FILE=$(call add_opt_prefix, $(PSP_SECG1_FILE), --subprog 1 --sec-gasket)
-OPT_SECG2_FILE=$(call add_opt_prefix, $(PSP_SECG2_FILE), --subprog 2 --sec-gasket)
-OPT_MP2FW1_FILE=$(call add_opt_prefix, $(PSP_MP2FW1_FILE), --subprog 1 --mp2-fw)
-OPT_MP2FW2_FILE=$(call add_opt_prefix, $(PSP_MP2FW2_FILE), --subprog 2 --mp2-fw)
-OPT_DRIVERS_FILE=$(call add_opt_prefix, $(PSP_DRIVERS_FILE), --drv-entry-pts)
-OPT_PSP_S0I3_FILE=$(call add_opt_prefix, $(PSP_S0I3_FILE), --s0i3drv)
-OPT_ABL0_FILE=$(call add_opt_prefix, $(PSP_ABL0_FILE), --abl-image)
-OPT_ABL1_FILE=$(call add_opt_prefix, $(PSP_ABL1_FILE), --abl-image)
-OPT_ABL2_FILE=$(call add_opt_prefix, $(PSP_ABL2_FILE), --abl-image)
-OPT_ABL3_FILE=$(call add_opt_prefix, $(PSP_ABL3_FILE), --abl-image)
-OPT_ABL4_FILE=$(call add_opt_prefix, $(PSP_ABL4_FILE), --abl-image)
-OPT_ABL5_FILE=$(call add_opt_prefix, $(PSP_ABL5_FILE), --abl-image)
-OPT_ABL6_FILE=$(call add_opt_prefix, $(PSP_ABL6_FILE), --abl-image)
-OPT_ABL7_FILE=$(call add_opt_prefix, $(PSP_ABL7_FILE), --abl-image)
-OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist)
OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage)
OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig)

@@ -297,15 +218,7 @@
OPT_PSP_BIOSBIN_FILE=$(call add_opt_prefix, $(PSP_BIOSBIN_FILE), --bios-bin)
OPT_PSP_BIOSBIN_DEST=$(call add_opt_prefix, $(PSP_BIOSBIN_DEST), --bios-bin-dest)
OPT_PSP_BIOSBIN_SIZE=$(call add_opt_prefix, $(PSP_BIOSBIN_SIZE), --bios-uncomp-size)
-OPT_PSP_PMUI_FILE1=$(call add_opt_prefix, $(PSP_PMUI_FILE1), --subprogram 0 --instance 1 --pmu-inst)
-OPT_PSP_PMUI_FILE2=$(call add_opt_prefix, $(PSP_PMUI_FILE2), --subprogram 0 --instance 4 --pmu-inst)
-OPT_PSP_PMUI_FILE3=$(call add_opt_prefix, $(PSP_PMUI_FILE3), --subprogram 1 --instance 1 --pmu-inst)
-OPT_PSP_PMUI_FILE4=$(call add_opt_prefix, $(PSP_PMUI_FILE4), --subprogram 1 --instance 4 --pmu-inst)
-OPT_PSP_PMUD_FILE1=$(call add_opt_prefix, $(PSP_PMUD_FILE1), --subprogram 0 --instance 1 --pmu-data)
-OPT_PSP_PMUD_FILE2=$(call add_opt_prefix, $(PSP_PMUD_FILE2), --subprogram 0 --instance 4 --pmu-data)
-OPT_PSP_PMUD_FILE3=$(call add_opt_prefix, $(PSP_PMUD_FILE3), --subprogram 1 --instance 1 --pmu-data)
-OPT_PSP_PMUD_FILE4=$(call add_opt_prefix, $(PSP_PMUD_FILE4), --subprogram 1 --instance 4 --pmu-data)
-OPT_MP2CFG_FILE=$(call add_opt_prefix, $(PSP_MP2CFG_FILE), --mp2-config)
+
OPT_PSP_SHAREDMEM_BASE=$(call add_opt_prefix, $(PSP_SHAREDMEM_BASE), --sharedmem)
OPT_PSP_SHAREDMEM_SIZE=$(call add_opt_prefix, $(PSP_SHAREDMEM_SIZE), --sharedmem-size)
OPT_APOB_NV_SIZE=$(call add_opt_prefix, $(APOB_NV_SIZE), --apob-nv-size)
@@ -314,49 +227,28 @@
OPT_EFS_SPI_SPEED=$(call add_opt_prefix, $(CONFIG_EFS_SPI_SPEED), --spi-speed)
OPT_EFS_SPI_MICRON_FLAG=$(call add_opt_prefix, $(CONFIG_EFS_SPI_MICRON_FLAG), --spi-micron-flag)

+OPT_PSP_SOFTFUSE=$(call add_opt_prefix, $(PSP_SOFTFUSE), --soft-fuse)
+
ifeq ($(CONFIG_VBOOT),)
OPT_APOB0_NV_SIZE=$(OPT_APOB_NV_SIZE)
OPT_APOB0_NV_BASE=$(OPT_APOB_NV_BASE)
endif

-AMDFW_COMMON_ARGS=$(OPT_AMD_PUBKEY_FILE) \
- $(OPT_PSPSECUREOS_FILE) \
- $(OPT_PSP_SEC_DBG_KEY_FILE) \
- $(OPT_SMUFW1_SUB2_FILE) \
- $(OPT_SMUFW2_SUB2_FILE) \
- $(OPT_SMUFW1_SUB1_FILE) \
- $(OPT_SMUFW2_SUB1_FILE) \
- $(OPT_PSP_APCB_FILES) \
+OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist)
+
+# Add all the files listed in the config file
+DEP_FILES=$(shell $(AMDFWTOOL) --config $(CONFIG_AMDFW_CONFIG_FILE) --depend)
+
+AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \
$(OPT_APOB_ADDR) \
$(OPT_PSP_BIOSBIN_FILE) \
$(OPT_PSP_BIOSBIN_DEST) \
$(OPT_PSP_BIOSBIN_SIZE) \
$(OPT_PSP_SOFTFUSE) \
- $(OPT_PSP_PMUI_FILE1) \
- $(OPT_PSP_PMUI_FILE2) \
- $(OPT_PSP_PMUI_FILE3) \
- $(OPT_PSP_PMUI_FILE4) \
- $(OPT_PSP_PMUD_FILE1) \
- $(OPT_PSP_PMUD_FILE2) \
- $(OPT_PSP_PMUD_FILE3) \
- $(OPT_PSP_PMUD_FILE4) \
- $(OPT_MP2CFG_FILE) \
- $(OPT_ABL0_FILE) \
- $(OPT_ABL1_FILE) \
- $(OPT_ABL2_FILE) \
- $(OPT_ABL3_FILE) \
- $(OPT_ABL4_FILE) \
- $(OPT_ABL5_FILE) \
- $(OPT_ABL6_FILE) \
- $(OPT_ABL7_FILE) \
+ $(OPT_PSP_USE_PSPSECUREOS) \
+ $(OPT_PSP_LOAD_MP2_FW) \
+ $(OPT_PSP_LOAD_S0I3_FW) \
$(OPT_WHITELIST_FILE) \
- $(OPT_SECG1_FILE) \
- $(OPT_SECG2_FILE) \
- $(OPT_MP2FW1_FILE) \
- $(OPT_MP2FW2_FILE) \
- $(OPT_DRIVERS_FILE) \
- $(OPT_PSP_S0I3_FILE) \
- $(OPT_IKEK_FILE) \
$(OPT_SEC_DEBUG_FILE) \
$(OPT_PSP_SHAREDMEM_BASE) \
$(OPT_PSP_SHAREDMEM_SIZE) \
@@ -365,45 +257,15 @@
$(OPT_EFS_SPI_READ_MODE) \
$(OPT_EFS_SPI_SPEED) \
$(OPT_EFS_SPI_MICRON_FLAG) \
+ --config $(CONFIG_AMDFW_CONFIG_FILE) \
--soc-name "Picasso" \
--flashsize $(CONFIG_ROM_SIZE)

-$(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \
- $(call strip_quotes, $(PSPBTLDR_FILE)) \
- $(call strip_quotes, $(PSPSECUREOS_FILE)) \
- $(call strip_quotes, $(PSP_SEC_DBG_KEY_FILE)) \
- $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \
- $(call strip_quotes, $(PSP_PMUI_FILE1)) \
- $(call strip_quotes, $(PSP_PMUI_FILE2)) \
- $(call strip_quotes, $(PSP_PMUI_FILE3)) \
- $(call strip_quotes, $(PSP_PMUI_FILE4)) \
- $(call strip_quotes, $(PSP_PMUD_FILE1)) \
- $(call strip_quotes, $(PSP_PMUD_FILE2)) \
- $(call strip_quotes, $(PSP_PMUD_FILE3)) \
- $(call strip_quotes, $(PSP_PMUD_FILE4)) \
- $(call strip_quotes, $(PSP_MP2CFG_FILE)) \
- $(call strip_quotes, $(PSP_SMUFW1_SUB1_FILE)) \
- $(call strip_quotes, $(PSP_SMUFW1_SUB2_FILE)) \
- $(call strip_quotes, $(PSP_SMUFW2_SUB1_FILE)) \
- $(call strip_quotes, $(PSP_SMUFW2_SUB2_FILE)) \
- $(call strip_quotes, $(PSP_ABL0_FILE)) \
- $(call strip_quotes, $(PSP_ABL1_FILE)) \
- $(call strip_quotes, $(PSP_ABL2_FILE)) \
- $(call strip_quotes, $(PSP_ABL3_FILE)) \
- $(call strip_quotes, $(PSP_ABL4_FILE)) \
- $(call strip_quotes, $(PSP_ABL5_FILE)) \
- $(call strip_quotes, $(PSP_ABL6_FILE)) \
- $(call strip_quotes, $(PSP_ABL7_FILE)) \
- $(call strip_quotes, $(PSP_WHITELIST_FILE)) \
- $(call strip_quotes, $(PSP_SECG1_FILE)) \
- $(call strip_quotes, $(PSP_SECG2_FILE)) \
- $(call_strip_quotes, $(PSP_DRIVERS_FILE)) \
- $(call_strip_quotes, $(PSP_S0I3_FILE)) \
- $(call_strip_quotes, $(PSP_IKEK_FILE)) \
- $(call_strip_quotes, $(PSP_SEC_DEBUG_FILE)) \
+$(obj)/amdfw.rom: $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \
$(PSP_VERSTAGE_FILE) \
$(PSP_VERSTAGE_SIG_FILE) \
$$(PSP_APCB_FILES) \
+ $(DEP_FILES) \
$(AMDFWTOOL) \
$(obj)/fmap_config.h
$(if $(PSP_APCB_FILES), ,$(error APCB_SOURCES is not set))
diff --git a/src/soc/amd/picasso/fw.cfg b/src/soc/amd/picasso/fw.cfg
new file mode 100644
index 0000000..e746d1e
--- /dev/null
+++ b/src/soc/amd/picasso/fw.cfg
@@ -0,0 +1,39 @@
+# PSP fw config file
+
+FIRMWARE_LOCATE 3rdparty/amd_blobs/picasso/PSP
+
+# type file
+AMD_PUBKEY_FILE AmdPubKeyRV.bin
+PSPBTLDR_FILE PspBootLoader_prod_RV.sbin
+PSPBTLDR_WL_FILE PspBootLoader_WL_RV.sbin
+PSP_SMUFW1_SUB1_FILE SmuFirmwareRV2.csbin
+PSP_SMUFW1_SUB2_FILE SmuFirmwarePCO.csbin
+PSP_SMUFW2_SUB1_FILE SmuFirmware2RV2.csbin
+PSP_SMUFW2_SUB2_FILE SmuFirmware2PCO.csbin
+PSPSECUREOS_FILE psp_os_combined_prod_RV.sbin
+PSP_SEC_DBG_KEY_FILE RavenSecureDebug_PublicKey.bin
+PSP_SEC_DEBUG_FILE secure_unlock_prod_RV.sbin
+PSP_ABL0_FILE AgesaBootloader0_prod_RV.csbin
+PSP_ABL1_FILE AgesaBootloader1_prod_RV.csbin
+PSP_ABL2_FILE AgesaBootloader2_prod_RV.csbin
+PSP_ABL3_FILE AgesaBootloader3_prod_RV.csbin
+PSP_ABL4_FILE AgesaBootloader4_prod_RV.csbin
+PSP_ABL5_FILE AgesaBootloader5_prod_RV.csbin
+PSP_ABL6_FILE AgesaBootloader6_prod_RV.csbin
+PSP_ABL7_FILE AgesaBootloader7_prod_RV.csbin
+PSP_IKEK_FILE PspIkekRV.bin
+PSP_SECG1_FILE security_policy_RV2_FP5_AM4.sbin
+PSP_SECG2_FILE security_policy_PCO_FP5_AM4.sbin
+PSP_MP2FW1_FILE MP2I2CFWRV2.sbin
+PSP_MP2FW2_FILE MP2I2CFWPCO.sbin
+PSP_MP2CFG_FILE MP2FWConfig.sbin
+PSP_DRIVERS_FILE drv_sys_prod_RV.sbin
+# BDT
+PSP_PMUI_FILE1 Appb_Rv_1D_Ddr4_Udimm_Imem.csbin
+PSP_PMUI_FILE2 Appb_Rv_2D_Ddr4_Imem.csbin
+PSP_PMUI_FILE3 Appb_Rv2_1D_ddr4_Udimm_Imem.csbin
+PSP_PMUI_FILE4 Appb_Rv2_2D_ddr4_Udimm_Imem.csbin
+PSP_PMUD_FILE1 Appb_Rv_1D_Ddr4_Udimm_Dmem.csbin
+PSP_PMUD_FILE2 Appb_Rv_2D_Ddr4_Dmem.csbin
+PSP_PMUD_FILE3 Appb_Rv2_1D_ddr4_Udimm_Dmem.csbin
+PSP_PMUD_FILE4 Appb_Rv2_2D_ddr4_Udimm_Dmem.csbin
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 2ef90eb..0e32005 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -190,12 +190,13 @@
string "GEC firmware path and filename"
depends on STONEYRIDGE_GEC_FWM

-config AMD_PUBKEY_FILE
- string "AMD public Key"
+config AMDFW_CONFIG_FILE
+ string
+ string "AMD PSP Firmware config file"
default "" if !USE_AMD_BLOBS
- default "3rdparty/amd_blobs/stoneyridge/PSP/CZ/AmdPubKeyCZ.bin" if AMD_APU_MERLINFALCON
- default "3rdparty/amd_blobs/stoneyridge/PSP/ST/AmdPubKeyST.bin" if AMD_APU_PRAIRIEFALCON
- default "3rdparty/amd_blobs/stoneyridge/PSP/ST/AmdPubKeyST.bin" if AMD_APU_STONEYRIDGE
+ default "src/soc/amd/stoneyridge/fw_cz.cfg" if AMD_APU_MERLINFALCON
+ default "src/soc/amd/stoneyridge/fw_st.cfg" if AMD_APU_PRAIRIEFALCON
+ default "src/soc/amd/stoneyridge/fw_st.cfg" if AMD_APU_STONEYRIDGE

config STONEYRIDGE_SATA_MODE
int "SATA Mode"
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc
index 16597e1..9211e81 100644
--- a/src/soc/amd/stoneyridge/Makefile.inc
+++ b/src/soc/amd/stoneyridge/Makefile.inc
@@ -101,7 +101,9 @@
0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1)

### 0
-FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)))
+
+FIRMWARE_LOCATE=$(shell grep -e FIRMWARE_LOCATE $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}')
+
ifneq ($(FIRMWARE_LOCATE),)

ifeq ($(CONFIG_AMD_APU_STONEYRIDGE),y)
@@ -119,134 +121,47 @@
endif # CONFIG_AMD_APU_MERLINFALCON
endif # CONFIG_AMD_APU_STONEYRIDGE

-###5
-PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).key
+add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )

-###1
-PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_prod_$(FIRMWARE_TYPE).sbin
+OPT_STONEYRIDGE_XHCI_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE), --xhci)
+OPT_STONEYRIDGE_GEC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE), --gec)

-###3
-PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecoveryBootLoader_prod_$(FIRMWARE_TYPE).sbin
+SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/$(shell awk '($$1=="PSP_SMUFW1_SUB0_FILE") {print $$2}' $(CONFIG_AMDFW_CONFIG_FILE))
+SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/$(shell awk '($$1=="PSP_SMUFW1_SUB1_FILE") {print $$2}' $(CONFIG_AMDFW_CONFIG_FILE))

-###4
-PSPNVRAM_FILE=$(top)/$(FIRMWARE_LOCATE)/PspNvram$(FIRMWARE_TYPE).bin
-
-###8 - Check for SMU firmware named either *.sbin or *.csbin. Both "signed" and
-### "compressed signed" are used by generations supported by this file.
-SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware_$(FIRMWARE_TYPE).csbin
-SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware_$(FIRMWARE_TYPE)_FN.csbin
-ifeq ("$(wildcard $(SMUFWM_FILE))","")
-SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE).sbin
-SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE)_FN.sbin
-endif
-
-###95
-SMUSCS_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuScs$(FIRMWARE_TYPE).bin
-
-###9
-PSPSECUREDEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureDebug$(FIRMWARE_TYPE).Key
-
-ifeq ($(CONFIG_USE_PSPSECUREOS),y)
-###2
-PSPSECUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs_prod_$(FIRMWARE_TYPE).csbin
-
-###12
-PSPTRUSTLETS_FILE=$(wildcard $(top)/$(FIRMWARE_LOCATE)/PspTrustlets*_prod_$(FIRMWARE_TYPE).cbin)
-
-###13
-TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/TrustletKey_prod_$(FIRMWARE_TYPE).sbin
-endif
-
-###18- Check for SMU firmware2 named either *.sbin or *.csbin
-### TODO: Remove *.sbin section after the blobs repo is updated.
-SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).csbin
-SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE)_FN.csbin
-ifeq ("$(wildcard $(SMUFIRMWARE2_FILE))","")
-SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).sbin
-SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE)_FN.sbin
-endif
+SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/$(shell awk '($$1=="PSP_SMUFW2_SUB0_FILE") {print $$2}' $(CONFIG_AMDFW_CONFIG_FILE))
+SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/$(shell awk '($$1=="PSP_SMUFW2_SUB1_FILE") {print $$2}' $(CONFIG_AMDFW_CONFIG_FILE))

ifeq ("$(wildcard $(SMUFWM_FN_FILE))","")
SMUFWM_FN_FILE=
SMUFIRMWARE2_FN_FILE=
endif

-add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )
-
-OPT_STONEYRIDGE_XHCI_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE), --xhci)
-OPT_STONEYRIDGE_GEC_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_GEC_FWM_FILEddd), --gec)
-
-OPT_AMD_PUBKEY_FILE=$(call add_opt_prefix, $(CONFIG_AMD_PUBKEY_FILE), --pubkey)
-OPT_PSPBTLDR_FILE=$(call add_opt_prefix, $(PSPBTLDR_FILE), --bootloader)
-OPT_SMUFWM_FILE=$(call add_opt_prefix, $(SMUFWM_FILE), --smufirmware)
-OPT_PSPRCVR_FILE=$(call add_opt_prefix, $(PSPRCVR_FILE), --recovery)
-OPT_PUBSIGNEDKEY_FILE=$(call add_opt_prefix, $(PUBSIGNEDKEY_FILE), --rtmpubkey)
-OPT_PSPNVRAM_FILE=$(call add_opt_prefix, $(PSPNVRAM_FILE), --nvram)
-OPT_PSPSECUREDEBUG_FILE=$(call add_opt_prefix, $(PSPSECUREDEBUG_FILE), --securedebug)
-ifeq ($(CONFIG_USE_PSPSECUREOS),y)
-OPT_PSPSECUREOS_FILE=$(call add_opt_prefix, $(PSPSECUREOS_FILE), --secureos)
-OPT_PSPTRUSTLETS_FILE=$(call add_opt_prefix, $(PSPTRUSTLETS_FILE), --trustlets)
-OPT_TRUSTLETKEY_FILE=$(call add_opt_prefix, $(TRUSTLETKEY_FILE), --trustletkey)
-endif
-OPT_SMUFIRMWARE2_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FILE), --smufirmware2)
-OPT_SMUSCS_FILE=$(call add_opt_prefix, $(SMUSCS_FILE), --smuscs)
-SUBPROG_FN_SMU_FW=1
-OPT_SMUFWM_FN_FILE=$(call add_opt_prefix, $(SMUFWM_FN_FILE), --subprogram $(SUBPROG_FN_SMU_FW) --smufirmware)
-OPT_SMUFIRMWARE2_FN_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FN_FILE), --subprogram $(SUBPROG_FN_SMU_FW) --smufirmware2)
-
ifeq ($(FIRMWARE_TYPE),ST)
OPT_COMBOCAPABLE=--combo-capable
endif

+ifeq ($(CONFIG_USE_PSPSECUREOS),y)
+PSP_USE_PSPSECUREOS="--use-pspsecureos"
+endif
+
+OPT_PSP_USE_PSPSECUREOS=$(call strip_quotes, $(PSP_USE_PSPSECUREOS))
+
+# Add all the files listed in the config file
+DEP_FILES=$(shell $(AMDFWTOOL) --config $(CONFIG_AMDFW_CONFIG_FILE) --depend)
+
$(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE)) \
$(call strip_quotes, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE)) \
- $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \
- $(call strip_quotes, $(PUBSIGNEDKEY_FILE)) \
- $(call strip_quotes, $(PSPBTLDR_FILE)) \
- $(call strip_quotes, $(PSPRCVR_FILE)) \
- $(call strip_quotes, $(PSPSECUREOS_FILE)) \
- $(call strip_quotes, $(PSPNVRAM_FILE)) \
- $(call strip_quotes, $(SMUFWM_FILE)) \
- $(call strip_quotes, $(SMUFWM_FN_FILE)) \
- $(call strip_quotes, $(SMUSCS_FILE)) \
- $(call strip_quotes, $(PSPSECUREDEBUG_FILE)) \
- $(call strip_quotes, $(PSPTRUSTLETS_FILE)) \
- $(call strip_quotes, $(TRUSTLETKEY_FILE)) \
- $(call strip_quotes, $(SMUFIRMWARE2_FILE)) \
- $(call strip_quotes, $(SMUFIRMWARE2_FN_FILE)) \
+ $(DEP_FILES) \
$(AMDFWTOOL)
rm -f $@
@printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
$(AMDFWTOOL) \
$(OPT_STONEYRIDGE_XHCI_FWM_FILE) \
$(OPT_STONEYRIDGE_GEC_FWM_FILE) \
- $(OPT_AMD_PUBKEY_FILE) \
- $(OPT_PSPBTLDR_FILE) \
- $(OPT_SMUFWM_FILE) \
- $(OPT_PSPRCVR_FILE) \
- $(OPT_PUBSIGNEDKEY_FILE) \
- $(OPT_PSPSECUREOS_FILE) \
- $(OPT_PSPNVRAM_FILE) \
- $(OPT_PSPSECUREDEBUG_FILE) \
- $(OPT_PSPTRUSTLETS_FILE) \
- $(OPT_TRUSTLETKEY_FILE) \
- $(OPT_SMUFIRMWARE2_FILE) \
- $(OPT_SMUSCS_FILE) \
- $(OPT_AMD_PUBKEY_FILE) \
- $(OPT_PSPBTLDR_FILE) \
- $(OPT_SMUFWM_FILE) \
- $(OPT_SMUFWM_FN_FILE) \
- $(OPT_PSPRCVR_FILE) \
- $(OPT_PUBSIGNEDKEY_FILE) \
- $(OPT_PSPSECUREOS_FILE) \
- $(OPT_PSPNVRAM_FILE) \
- $(OPT_PSPSECUREDEBUG_FILE) \
- $(OPT_PSPTRUSTLETS_FILE) \
- $(OPT_TRUSTLETKEY_FILE) \
- $(OPT_SMUFIRMWARE2_FILE) \
- $(OPT_SMUFIRMWARE2_FN_FILE) \
- $(OPT_SMUSCS_FILE) \
$(OPT_COMBOCAPABLE)\
+ $(OPT_PSP_USE_PSPSECUREOS) \
+ --config $(CONFIG_AMDFW_CONFIG_FILE) \
--flashsize $(CONFIG_ROM_SIZE) \
--location $(shell printf "0x%x" $(STONEYRIDGE_FWM_POSITION)) \
--output $@
diff --git a/src/soc/amd/stoneyridge/fw_cz.cfg b/src/soc/amd/stoneyridge/fw_cz.cfg
new file mode 100644
index 0000000..acbf136
--- /dev/null
+++ b/src/soc/amd/stoneyridge/fw_cz.cfg
@@ -0,0 +1,18 @@
+# PSP fw config file
+
+FIRMWARE_LOCATE 3rdparty/amd_blobs/stoneyridge/PSP/CZ
+#PSP
+AMD_PUBKEY_FILE AmdPubKeyCZ.bin
+PSPBTLDR_FILE PspBootLoader_prod_CZ.sbin
+PSP_SMUFW1_SUB0_FILE SmuFirmwareCZ.sbin
+#PSP_SMUFW1_SUB1_FILE SmuFirmware_CZ_FN.csbin
+PSP_SMUFW2_SUB0_FILE SmuFirmware2_prod_CZ.sbin
+#PSP_SMUFW2_SUB1_FILE SmuFirmware2_prod_CZ_FN.sbin
+PSPRCVR_FILE PspRecoveryBootLoader_prod_CZ.sbin
+PUBSIGNEDKEY_FILE RtmPubSignedCZ.key
+PSPNVRAM_FILE PspNvramCZ.bin
+PSPSECUREOS_FILE PspSecureOs_prod_CZ.csbin
+SMUSCS_FILE SmuScsCZ.bin
+PSPTRUSTLETS_FILE PspTrustlets_prod_CZ.cbin
+TRUSTLETKEY_FILE TrustletKey_prod_CZ.sbin
+PSPSECUREDEBUG_FILE PspSecureDebugCZ.Key
diff --git a/src/soc/amd/stoneyridge/fw_st.cfg b/src/soc/amd/stoneyridge/fw_st.cfg
new file mode 100644
index 0000000..aa02668
--- /dev/null
+++ b/src/soc/amd/stoneyridge/fw_st.cfg
@@ -0,0 +1,20 @@
+# PSP fw config file
+
+FIRMWARE_LOCATE 3rdparty/amd_blobs/stoneyridge/PSP/ST
+
+#XHCI_FWM_FILE xhci.bin
+#PSP
+AMD_PUBKEY_FILE AmdPubKeyST.bin
+PSPBTLDR_FILE PspBootLoader_prod_ST.sbin
+PSP_SMUFW1_SUB0_FILE SmuFirmware_ST.csbin
+PSP_SMUFW1_SUB1_FILE SmuFirmware_ST_FN.csbin
+PSP_SMUFW2_SUB0_FILE SmuFirmware2_prod_ST.csbin
+PSP_SMUFW2_SUB1_FILE SmuFirmware2_prod_ST_FN.sbin
+PSPRCVR_FILE PspRecoveryBootLoader_prod_ST.sbin
+PUBSIGNEDKEY_FILE RtmPubSignedST.key
+PSPNVRAM_FILE PspNvramST.bin
+PSPSECUREOS_FILE PspSecureOs_prod_ST.csbin
+SMUSCS_FILE SmuScsST.bin
+PSPTRUSTLETS_FILE PspTrustlets_prod_ST.cbin
+TRUSTLETKEY_FILE TrustletKey_prod_ST.sbin
+PSPSECUREDEBUG_FILE PspSecureDebugST.Key
diff --git a/src/southbridge/amd/pi/hudson/Kconfig b/src/southbridge/amd/pi/hudson/Kconfig
index b569690..cfe85a1 100644
--- a/src/southbridge/amd/pi/hudson/Kconfig
+++ b/src/southbridge/amd/pi/hudson/Kconfig
@@ -63,6 +63,10 @@
bool
default y if CPU_AMD_PI_00730F01 || CPU_AMD_PI_00660F01

+config AMDFW_CONFIG_FILE
+ string "AMD PSP Firmware config file"
+ default "src/southbridge/amd/pi/hudson/fw_avl.cfg" if CPU_AMD_PI_00730F01
+
config HUDSON_XHCI_FWM_FILE
string "XHCI firmware path and filename"
default "3rdparty/blobs/southbridge/amd/avalon/xhci.bin" if SOUTHBRIDGE_AMD_PI_AVALON
diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc
index 09bf1d6..c845f84 100644
--- a/src/southbridge/amd/pi/hudson/Makefile.inc
+++ b/src/southbridge/amd/pi/hudson/Makefile.inc
@@ -78,14 +78,9 @@
ifeq ($(CONFIG_HUDSON_PSP), y)

ifeq ($(CONFIG_CPU_AMD_PI_00730F01), y)
-FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)))
+FIRMWARE_LOCATE=$(shell grep -e FIRMWARE_LOCATE $(CONFIG_AMDFW_CONFIG_FILE) | awk '{print $$2}')
FIRMWARE_TYPE=

-PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader.Bypass.sbin
-#PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecovery.sbin
-#PSPSECUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs.sbin
-#PSPTRUSTLETS_FILE=$(top)/$(FIRMWARE_LOCATE)/trustlets.bin
-#TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/Trustlet.tkn.cert
endif

ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y)
@@ -102,9 +97,6 @@

#PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).key
#PSPNVRAM_FILE=$(top)/$(FIRMWARE_LOCATE)/PspNvram$(FIRMWARE_TYPE).bin
-SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE).sbin
-SMUFWM_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE)_FN.sbin
-SMUSCS_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuScs$(FIRMWARE_TYPE).bin
#PSPSECUREDEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureDebug$(FIRMWARE_TYPE).Key

endif
@@ -128,21 +120,12 @@
OPT_SMUFIRMWARE2_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FILE), --smufirmware2)
OPT_SMUSCS_FILE=$(call add_opt_prefix, $(SMUSCS_FILE), --smuscs)

+# Add all the files listed in the config file
+DEP_FILES=$(shell $(AMDFWTOOL) --config $(CONFIG_AMDFW_CONFIG_FILE) --depend)
+
$(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_HUDSON_XHCI_FWM_FILE)) \
$(call strip_quotes, $(CONFIG_HUDSON_IMC_FWM_FILE)) \
$(call strip_quotes, $(CONFIG_HUDSON_GEC_FWM_FILE)) \
- $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE)) \
- $(call strip_quotes, $(PUBSIGNEDKEY_FILE)) \
- $(call strip_quotes, $(PSPBTLDR_FILE)) \
- $(call strip_quotes, $(PSPRCVR_FILE)) \
- $(call strip_quotes, $(PSPSECUREOS_FILE)) \
- $(call strip_quotes, $(PSPNVRAM_FILE)) \
- $(call strip_quotes, $(SMUFWM_FILE)) \
- $(call strip_quotes, $(SMUSCS_FILE)) \
- $(call strip_quotes, $(PSPSECUREDEBUG_FILE)) \
- $(call strip_quotes, $(PSPTRUSTLETS_FILE)) \
- $(call strip_quotes, $(TRUSTLETKEY_FILE)) \
- $(call strip_quotes, $(SMUFIRMWARE2_FILE)) \
$(call strip_quotes, $(AMD_PUBKEY2_FILE)) \
$(call strip_quotes, $(PUBSIGNEDKEY2_FILE)) \
$(call strip_quotes, $(PSPBTLDR2_FILE)) \
@@ -157,6 +140,7 @@
$(call strip_quotes, $(TRUSTLETKEY2_FILE)) \
$(call strip_quotes, $(SMUFIRMWARE2_2_FILE)) \
$(call strip_quotes, $(SMUFIRMWARE2_2_FN_FILE)) \
+ $(DEP_FILES) \
$(AMDFWTOOL)
rm -f $@
@printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
@@ -164,18 +148,6 @@
$(OPT_HUDSON_XHCI_FWM_FILE) \
$(OPT_HUDSON_IMC_FWM_FILE) \
$(OPT_HUDSON_GEC_FWM_FILE) \
- $(OPT_AMD_PUBKEY_FILE) \
- $(OPT_PSPBTLDR_FILE) \
- $(OPT_SMUFWM_FILE) \
- $(OPT_PSPRCVR_FILE) \
- $(OPT_PUBSIGNEDKEY_FILE) \
- $(OPT_PSPSECUREOS_FILE) \
- $(OPT_PSPNVRAM_FILE) \
- $(OPT_PSPSECUREDEBUG_FILE) \
- $(OPT_PSPTRUSTLETS_FILE) \
- $(OPT_TRUSTLETKEY_FILE) \
- $(OPT_SMUFIRMWARE2_FILE) \
- $(OPT_SMUSCS_FILE) \
$(OPT_2AMD_PUBKEY_FILE) \
$(OPT_2PSPBTLDR_FILE) \
$(OPT_2SMUFWM_FILE) \
@@ -192,6 +164,7 @@
$(OPT_2SMUSCS_FILE) \
--flashsize $(CONFIG_ROM_SIZE) \
--location $(HUDSON_FWM_POSITION) \
+ --config $(CONFIG_AMDFW_CONFIG_FILE) \
--output $@

ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
diff --git a/src/southbridge/amd/pi/hudson/fw_avl.cfg b/src/southbridge/amd/pi/hudson/fw_avl.cfg
new file mode 100644
index 0000000..f65d6b8
--- /dev/null
+++ b/src/southbridge/amd/pi/hudson/fw_avl.cfg
@@ -0,0 +1,8 @@
+# PSP fw config file
+
+FIRMWARE_LOCATE 3rdparty/blobs/southbridge/amd/avalon/PSP
+#PSP
+AMD_PUBKEY_FILE AmdPubKey.bin
+PSPBTLDR_FILE PspBootLoader.Bypass.sbin
+PSP_SMUFW1_SUB0_FILE SmuFirmware.sbin
+SMUSCS_FILE SmuScs.bin
diff --git a/util/amdfwtool/Makefile b/util/amdfwtool/Makefile
index 8f4208c..58606e3 100644
--- a/util/amdfwtool/Makefile
+++ b/util/amdfwtool/Makefile
@@ -2,7 +2,7 @@

HOSTCC ?= cc

-SRC = amdfwtool.c
+SRC = amdfwtool.c data_parse.c
OBJ = $(SRC:%.c=%.o)
TARGET = amdfwtool
CFLAGS=-O2 -Wall -Wextra -Wshadow
diff --git a/util/amdfwtool/Makefile.inc b/util/amdfwtool/Makefile.inc
index b1a2130..e794ed9 100644
--- a/util/amdfwtool/Makefile.inc
+++ b/util/amdfwtool/Makefile.inc
@@ -1,6 +1,6 @@
# SPDX-License-Identifier: BSD-3-Clause

-amdfwtoolobj = amdfwtool.o
+amdfwtoolobj = amdfwtool.o data_parse.o

AMDFWTOOLCFLAGS=-O2 -Wall -Wextra -Wshadow

diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c
index f5030d3..561b511 100644
--- a/util/amdfwtool/amdfwtool.c
+++ b/util/amdfwtool/amdfwtool.c
@@ -56,6 +56,9 @@
#include <string.h>
#include <stdlib.h>
#include <getopt.h>
+#include <libgen.h>
+
+#include "amdfwtool.h"

#define AMD_ROMSIG_OFFSET 0x20000
#define MIN_ROM_KB 256
@@ -94,13 +97,6 @@
*/
#define PSP_COMBO 0

-#if defined(__GLIBC__)
-typedef unsigned long long int uint64_t;
-typedef unsigned int uint32_t;
-typedef unsigned char uint8_t;
-typedef unsigned short uint16_t;
-#endif
-
/*
* Creates the OSI Fletcher checksum. See 8473-1, Appendix C, section C.3.
* The checksum field of the passed PDU does not need to be reset to zero.
@@ -165,39 +161,22 @@
printf("-A | --combo-capable Place PSP directory pointer at Embedded Firmware\n");
printf(" offset able to support combo directory\n");
printf("-M | --multilevel Generate primary and secondary tables\n");
- printf("-p | --pubkey <FILE> Add pubkey\n");
- printf("-b | --bootloader <FILE> Add bootloader\n");
- printf("-S | --subprogram <number> Sets subprogram field for the next firmware\n");
- printf("-s | --smufirmware <FILE> Add smufirmware\n");
- printf("-r | --recovery <FILE> Add recovery\n");
- printf("-k | --rtmpubkey <FILE> Add rtmpubkey\n");
- printf("-c | --secureos <FILE> Add secureos\n");
- printf("-n | --nvram <FILE> Add nvram\n");
- printf("-d | --securedebug <FILE> Add securedebug\n");
- printf("-t | --trustlets <FILE> Add trustlets\n");
- printf("-u | --trustletkey <FILE> Add trustletkey\n");
- printf("-w | --smufirmware2 <FILE> Add smufirmware2\n");
- printf("-m | --smuscs <FILE> Add smuscs\n");
- printf("-T | --soft-fuse <HEX_VAL> Override default soft fuse values\n");
- printf("-z | --abl-image <FILE> Add AGESA Binary\n");
- printf("-J | --sec-gasket <FILE> Add security gasket\n");
- printf("-B | --mp2-fw <FILE> Add MP2 firmware\n");
- printf("-N | --secdebug <FILE> Add secure unlock image\n");
- printf("-U | --token-unlock Reserve space for debug token\n");
- printf("-K | --drv-entry-pts <FILE> Add PSP driver entry points\n");
- printf("-L | --ikek <FILE> Add Wrapped iKEK\n");
- printf("-Y | --s0i3drv <FILE> Add s0i3 driver\n");
+ printf("-n | --nvram <FILE> Add nvram binary\n");
+ printf("-T | --soft-fuse Set soft fuse\n");
+ printf("-U | --token-unlock Set token unlock\n");
+ printf("-W | --whitelist Set if there is a whitelist\n");
+ printf("-S | --use-pspsecureos Set if psp secure OS is needed\n");
+ printf("-p | --load-mp2-fw Set if load MP2 firmware\n");
+ printf("-L | --load-s0i3 Set if load s0i3 firmware\n");
printf("-Z | --verstage <FILE> Add verstage\n");
+ printf("-E | --verstage_sig Add verstage signature");
printf("\nBIOS options:\n");
printf("-I | --instance <number> Sets instance field for the next BIOS firmware\n");
printf("-a | --apcb <FILE> Add AGESA PSP customization block\n");
printf("-Q | --apob-base <HEX_VAL> Destination for AGESA PSP output block\n");
printf("-F | --apob-nv-base <HEX_VAL> Location of S3 resume data\n");
printf("-H | --apob-nv-size <HEX_VAL> Size of S3 resume data\n");
- printf("-y | --pmu-inst <FILE> Add PMU firmware instruction portion\n");
- printf("-G | --pmu-data <FILE> Add PMU firmware data portion\n");
printf("-O | --ucode <FILE> Add microcode patch\n");
- printf("-X | --mp2-config <FILE> Add MP2 configuration\n");
printf("-V | --bios-bin <FILE> Add compressed image; auto source address\n");
printf("-e | --bios-bin-src <HEX_VAL> Address in flash of source if -V not used\n");
printf("-v | --bios-bin-dest <HEX_VAL> Destination for uncompressed BIOS\n");
@@ -236,93 +215,11 @@
printf(" 0x1 Micron parts are always used\n");
printf(" 0x2 Micron parts optional, this option is only\n");
printf(" supported with RN/LCN SOC\n");
+ printf("-c | --config <config file> Config file\n");
+ printf("-D | --depend List out the firmware files\n");
}

-typedef enum _amd_bios_type {
- AMD_BIOS_APCB = 0x60,
- AMD_BIOS_APOB = 0x61,
- AMD_BIOS_BIN = 0x62,
- AMD_BIOS_APOB_NV = 0x63,
- AMD_BIOS_PMUI = 0x64,
- AMD_BIOS_PMUD = 0x65,
- AMD_BIOS_UCODE = 0x66,
- AMD_BIOS_APCB_BK = 0x68,
- AMD_BIOS_MP2_CFG = 0x6a,
- AMD_BIOS_PSP_SHARED_MEM = 0x6b,
- AMD_BIOS_L2_PTR = 0x70,
- AMD_BIOS_INVALID,
-} amd_bios_type;
-
-#define BDT_LVL1 0x1
-#define BDT_LVL2 0x2
-#define BDT_BOTH (BDT_LVL1 | BDT_LVL2)
-typedef struct _amd_bios_entry {
- amd_bios_type type;
- int region_type;
- int reset;
- int copy;
- int ro;
- int zlib;
- int inst;
- int subpr;
- uint64_t src;
- uint64_t dest;
- size_t size;
- char *filename;
- int level;
-} amd_bios_entry;
-
-typedef enum _amd_fw_type {
- AMD_FW_PSP_PUBKEY = 0,
- AMD_FW_PSP_BOOTLOADER = 1,
- AMD_FW_PSP_SMU_FIRMWARE = 8,
- AMD_FW_PSP_RECOVERY = 3,
- AMD_FW_PSP_RTM_PUBKEY = 5,
- AMD_FW_PSP_SECURED_OS = 2,
- AMD_FW_PSP_NVRAM = 4,
- AMD_FW_PSP_SECURED_DEBUG = 9,
- AMD_FW_PSP_TRUSTLETS = 12,
- AMD_FW_PSP_TRUSTLETKEY = 13,
- AMD_FW_PSP_SMU_FIRMWARE2 = 18,
- AMD_PSP_FUSE_CHAIN = 11,
- AMD_FW_PSP_SMUSCS = 95,
- AMD_DEBUG_UNLOCK = 0x13,
- AMD_WRAPPED_IKEK = 0x21,
- AMD_TOKEN_UNLOCK = 0x22,
- AMD_SEC_GASKET = 0x24,
- AMD_MP2_FW = 0x25,
- AMD_DRIVER_ENTRIES = 0x28,
- AMD_S0I3_DRIVER = 0x2d,
- AMD_ABL0 = 0x30,
- AMD_ABL1 = 0x31,
- AMD_ABL2 = 0x32,
- AMD_ABL3 = 0x33,
- AMD_ABL4 = 0x34,
- AMD_ABL5 = 0x35,
- AMD_ABL6 = 0x36,
- AMD_ABL7 = 0x37,
- AMD_FW_PSP_WHITELIST = 0x3a,
- AMD_FW_L2_PTR = 0x40,
- AMD_FW_PSP_VERSTAGE = 0x52,
- AMD_FW_VERSTAGE_SIG = 0x53,
- AMD_FW_IMC,
- AMD_FW_GEC,
- AMD_FW_XHCI,
- AMD_FW_INVALID,
-} amd_fw_type;
-
-#define PSP_LVL1 0x1
-#define PSP_LVL2 0x2
-#define PSP_BOTH (PSP_LVL1 | PSP_LVL2)
-typedef struct _amd_fw_entry {
- amd_fw_type type;
- uint8_t subprog;
- char *filename;
- int level;
- uint64_t other;
-} amd_fw_entry;
-
-static amd_fw_entry amd_psp_fw_table[] = {
+amd_fw_entry amd_psp_fw_table[] = {
{ .type = AMD_FW_PSP_PUBKEY, .level = PSP_BOTH },
{ .type = AMD_FW_PSP_BOOTLOADER, .level = PSP_BOTH },
{ .type = AMD_FW_PSP_SMU_FIRMWARE, .subprog = 0, .level = PSP_BOTH },
@@ -365,14 +262,14 @@
{ .type = AMD_FW_INVALID },
};

-static amd_fw_entry amd_fw_table[] = {
+amd_fw_entry amd_fw_table[] = {
{ .type = AMD_FW_XHCI },
{ .type = AMD_FW_IMC },
{ .type = AMD_FW_GEC },
{ .type = AMD_FW_INVALID },
};

-static amd_bios_entry amd_bios_table[] = {
+amd_bios_entry amd_bios_table[] = {
{ .type = AMD_BIOS_APCB, .inst = 0, .level = BDT_BOTH },
{ .type = AMD_BIOS_APCB, .inst = 1, .level = BDT_BOTH },
{ .type = AMD_BIOS_APCB, .inst = 2, .level = BDT_BOTH },
@@ -699,6 +596,33 @@
}
}

+static void free_psp_firmware_filenames(amd_fw_entry *fw_table)
+{
+ amd_fw_entry *index;
+
+ for (index = fw_table; index->type != AMD_FW_INVALID; index++) {
+ if (index->filename &&
+ index->type != AMD_FW_VERSTAGE_SIG &&
+ index->type != AMD_FW_PSP_VERSTAGE &&
+ index->type != AMD_FW_PSP_WHITELIST) {
+ free(index->filename);
+ }
+ }
+}
+
+static void free_bdt_firmware_filenames(amd_bios_entry *fw_table)
+{
+ amd_bios_entry *index;
+
+ for (index = fw_table; index->type != AMD_BIOS_INVALID; index++) {
+ if (index->filename &&
+ index->type != AMD_BIOS_APCB &&
+ index->type != AMD_BIOS_BIN &&
+ index->type != AMD_BIOS_APCB_BK)
+ free(index->filename);
+ }
+}
+
static void integrate_psp_firmwares(context *ctx,
psp_directory_table *pspdir,
psp_directory_table *pspdir2,
@@ -1083,8 +1007,9 @@
LONGOPT_SPI_MICRON_FLAG = 258,
};

-// Unused values: D
-static const char *optstring = "x:i:g:AMS:p:b:s:r:k:c:n:d:t:u:w:m:T:z:J:B:K:L:Y:N:UW:I:a:Q:V:e:v:j:y:G:O:X:F:H:o:f:l:hZ:qR:P:C:E:";
+/* Unused values: BGJKNXYbdkmprstuwyz*/
+static const char *optstring = "x:i:g:AMn:T:SPLUW:I:a:Q:V:e:v:j:O:F:"
+ "H:o:f:l:hZ:qR:C:c:E:D";

static struct option long_options[] = {
{"xhci", required_argument, 0, 'x' },
@@ -1093,29 +1018,13 @@
/* PSP Directory Table items */
{"combo-capable", no_argument, 0, 'A' },
{"multilevel", no_argument, 0, 'M' },
- {"subprogram", required_argument, 0, 'S' },
- {"pubkey", required_argument, 0, 'p' },
- {"bootloader", required_argument, 0, 'b' },
- {"smufirmware", required_argument, 0, 's' },
- {"recovery", required_argument, 0, 'r' },
- {"rtmpubkey", required_argument, 0, 'k' },
- {"secureos", required_argument, 0, 'c' },
{"nvram", required_argument, 0, 'n' },
- {"securedebug", required_argument, 0, 'd' },
- {"trustlets", required_argument, 0, 't' },
- {"trustletkey", required_argument, 0, 'u' },
- {"smufirmware2", required_argument, 0, 'w' },
- {"smuscs", required_argument, 0, 'm' },
{"soft-fuse", required_argument, 0, 'T' },
- {"abl-image", required_argument, 0, 'z' },
- {"sec-gasket", required_argument, 0, 'J' },
- {"mp2-fw", required_argument, 0, 'B' },
- {"drv-entry-pts", required_argument, 0, 'K' },
- {"ikek", required_argument, 0, 'L' },
- {"s0i3drv", required_argument, 0, 'Y' },
- {"secdebug", required_argument, 0, 'N' },
{"token-unlock", no_argument, 0, 'U' },
{"whitelist", required_argument, 0, 'W' },
+ {"use-pspsecureos", no_argument, 0, 'S' },
+ {"load-mp2-fw", no_argument, 0, 'p' },
+ {"load-s0i3", no_argument, 0, 'L' },
{"verstage", required_argument, 0, 'Z' },
{"verstage_sig", required_argument, 0, 'E' },
/* BIOS Directory Table items */
@@ -1126,10 +1035,7 @@
{"bios-bin-src", required_argument, 0, 'e' },
{"bios-bin-dest", required_argument, 0, 'v' },
{"bios-uncomp-size", required_argument, 0, 'j' },
- {"pmu-inst", required_argument, 0, 'y' },
- {"pmu-data", required_argument, 0, 'G' },
{"ucode", required_argument, 0, 'O' },
- {"mp2-config", required_argument, 0, 'X' },
{"apob-nv-base", required_argument, 0, 'F' },
{"apob-nv-size", required_argument, 0, 'H' },
/* Embedded Firmware Structure items*/
@@ -1144,11 +1050,14 @@
{"sharedmem", required_argument, 0, 'R' },
{"sharedmem-size", required_argument, 0, 'P' },
{"soc-name", required_argument, 0, 'C' },
+
+ {"config", required_argument, 0, 'c' },
{"help", no_argument, 0, 'h' },
+ {"depend", no_argument, 0, 'D' },
{NULL, 0, 0, 0 }
};

-static void register_fw_fuse(char *str)
+void register_fw_fuse(char *str)
{
uint32_t i;

@@ -1325,11 +1234,11 @@
int comboable = 0;
int fuse_defined = 0;
int targetfd;
- char *output = NULL;
+ char *output = NULL, *config = NULL;
+ FILE *config_handle;
context ctx = { 0 };
/* Values cleared after each firmware or parameter, regardless if N/A */
uint8_t sub = 0, instance = 0;
- int abl_image = 0;
uint32_t dir_location = 0;
bool any_location = 0;
uint32_t romsig_offset;
@@ -1340,6 +1249,14 @@
uint8_t efs_spi_micron_flag = 0xff;

int multi = 0;
+ amd_cb_config cb_config;
+ int list_deps = 0;
+
+ cb_config.have_whitelist = 0;
+ cb_config.unlock_secure = 0;
+ cb_config.use_secureos = 0;
+ cb_config.load_mp2_fw = 0;
+ cb_config.s0i3 = 0;

while (1) {
int optindex = 0;
@@ -1370,69 +1287,22 @@
break;
case 'U':
register_fw_token_unlock();
+ cb_config.unlock_secure = 1;
sub = instance = 0;
break;
case 'S':
- sub = (uint8_t)strtoul(optarg, &tmp, 16);
+ cb_config.use_secureos = 1;
break;
case 'I':
instance = strtoul(optarg, &tmp, 16);
break;
case 'p':
- register_fw_filename(AMD_FW_PSP_PUBKEY, sub, optarg);
- sub = instance = 0;
- break;
- case 'b':
- register_fw_filename(AMD_FW_PSP_BOOTLOADER,
- sub, optarg);
- sub = instance = 0;
- break;
- case 's':
- register_fw_filename(AMD_FW_PSP_SMU_FIRMWARE,
- sub, optarg);
- sub = instance = 0;
- break;
- case 'r':
- register_fw_filename(AMD_FW_PSP_RECOVERY, sub, optarg);
- sub = instance = 0;
- break;
- case 'k':
- register_fw_filename(AMD_FW_PSP_RTM_PUBKEY,
- sub, optarg);
- sub = instance = 0;
- break;
- case 'c':
- register_fw_filename(AMD_FW_PSP_SECURED_OS,
- sub, optarg);
- sub = instance = 0;
+ cb_config.load_mp2_fw = 1;
break;
case 'n':
register_fw_filename(AMD_FW_PSP_NVRAM, sub, optarg);
sub = instance = 0;
break;
- case 'd':
- register_fw_filename(AMD_FW_PSP_SECURED_DEBUG,
- sub, optarg);
- sub = instance = 0;
- break;
- case 't':
- register_fw_filename(AMD_FW_PSP_TRUSTLETS, sub, optarg);
- sub = instance = 0;
- break;
- case 'u':
- register_fw_filename(AMD_FW_PSP_TRUSTLETKEY,
- sub, optarg);
- sub = instance = 0;
- break;
- case 'w':
- register_fw_filename(AMD_FW_PSP_SMU_FIRMWARE2,
- sub, optarg);
- sub = instance = 0;
- break;
- case 'm':
- register_fw_filename(AMD_FW_PSP_SMUSCS, sub, optarg);
- sub = instance = 0;
- break;
case 'T':
register_fw_fuse(optarg);
fuse_defined = 1;
@@ -1478,56 +1348,18 @@
register_fw_addr(AMD_BIOS_BIN, 0, 0, optarg);
sub = instance = 0;
break;
- case 'y':
- register_bdt_data(AMD_BIOS_PMUI, sub, instance, optarg);
- sub = instance = 0;
- break;
- case 'G':
- register_bdt_data(AMD_BIOS_PMUD, sub, instance, optarg);
- sub = instance = 0;
- break;
case 'O':
register_bdt_data(AMD_BIOS_UCODE, sub,
instance, optarg);
sub = instance = 0;
break;
- case 'J':
- register_fw_filename(AMD_SEC_GASKET, sub, optarg);
- sub = instance = 0;
- break;
- case 'B':
- register_fw_filename(AMD_MP2_FW, sub, optarg);
- sub = instance = 0;
- break;
- case 'z':
- register_fw_filename(AMD_ABL0 + abl_image++,
- sub, optarg);
- sub = instance = 0;
- break;
- case 'X':
- register_bdt_data(AMD_BIOS_MP2_CFG, sub,
- instance, optarg);
- sub = instance = 0;
- break;
- case 'K':
- register_fw_filename(AMD_DRIVER_ENTRIES, sub, optarg);
- sub = instance = 0;
- break;
case 'L':
- register_fw_filename(AMD_WRAPPED_IKEK, sub, optarg);
- sub = instance = 0;
- break;
- case 'Y':
- register_fw_filename(AMD_S0I3_DRIVER, sub, optarg);
- sub = instance = 0;
- break;
- case 'N':
- register_fw_filename(AMD_DEBUG_UNLOCK, sub, optarg);
- sub = instance = 0;
+ cb_config.s0i3 = 1;
break;
case 'W':
register_fw_filename(AMD_FW_PSP_WHITELIST, sub, optarg);
sub = instance = 0;
+ cb_config.have_whitelist = 1;
break;
case 'Z':
register_fw_filename(AMD_FW_PSP_VERSTAGE, sub, optarg);
@@ -1590,30 +1422,50 @@
sub = instance = 0;
break;

+ case 'c':
+ config = optarg;
+ break;
case 'h':
usage();
return 0;
+ case 'D':
+ list_deps = 1;
+ break;
default:
break;
}
}

+ if (config) {
+ config_handle = fopen(config, "r");
+ if (config_handle == NULL) {
+ fprintf(stderr, "Can not open file %s for reading: %s\n",
+ config, strerror(errno));
+ exit(1);
+ }
+ if (process_config(config_handle, &cb_config, list_deps) == 0) {
+ fprintf(stderr, "Configuration file %s parsing error\n", config);
+ fclose(config_handle);
+ exit(1);
+ }
+ fclose(config_handle);
+ }
if (!fuse_defined)
register_fw_fuse(DEFAULT_SOFT_FUSE_CHAIN);

- if (!output) {
- printf("Error: Output value is not specified.\n\n");
+ if (!output && !list_deps) {
+ fprintf(stderr, "Error: Output value is not specified.\n\n");
retval = 1;
}

- if (ctx.rom_size % 1024 != 0) {
- printf("Error: ROM Size (%d bytes) should be a multiple of"
+ if ((ctx.rom_size % 1024 != 0) && !list_deps) {
+ fprintf(stderr, "Error: ROM Size (%d bytes) should be a multiple of"
" 1024 bytes.\n\n", ctx.rom_size);
retval = 1;
}

- if (ctx.rom_size < MIN_ROM_KB * 1024) {
- printf("Error: ROM Size (%dKB) must be at least %dKB.\n\n",
+ if ((ctx.rom_size < MIN_ROM_KB * 1024) && !list_deps) {
+ fprintf(stderr, "Error: ROM Size (%dKB) must be at least %dKB.\n\n",
ctx.rom_size / 1024, MIN_ROM_KB);
retval = 1;
}
@@ -1623,6 +1475,10 @@
return retval;
}

+ if (list_deps) {
+ return retval;
+ }
+
printf(" AMDFWTOOL Using ROM size of %dKB\n", ctx.rom_size / 1024);

rom_base_address = 0xFFFFFFFF - ctx.rom_size + 1;
@@ -1745,6 +1601,10 @@
amd_romsig->bios1_entry = BUFF_TO_RUN(ctx, biosdir);
}

+ /* Free the filename. */
+ free_psp_firmware_filenames(amd_psp_fw_table);
+ free_bdt_firmware_filenames(amd_bios_table);
+
targetfd = open(output, O_RDWR | O_CREAT | O_TRUNC, 0666);
if (targetfd >= 0) {
ssize_t bytes;
diff --git a/util/amdfwtool/amdfwtool.h b/util/amdfwtool/amdfwtool.h
new file mode 100644
index 0000000..198642c
--- /dev/null
+++ b/util/amdfwtool/amdfwtool.h
@@ -0,0 +1,119 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef _AMD_FW_TOOL_H_
+#define _AMD_FW_TOOL_H_
+
+#if defined(__GLIBC__)
+typedef unsigned long long int uint64_t;
+typedef unsigned int uint32_t;
+typedef unsigned char uint8_t;
+typedef unsigned short uint16_t;
+#endif
+
+
+typedef enum _amd_fw_type {
+ AMD_FW_PSP_PUBKEY = 0,
+ AMD_FW_PSP_BOOTLOADER = 1,
+ AMD_FW_PSP_SMU_FIRMWARE = 8,
+ AMD_FW_PSP_RECOVERY = 3,
+ AMD_FW_PSP_RTM_PUBKEY = 5,
+ AMD_FW_PSP_SECURED_OS = 2,
+ AMD_FW_PSP_NVRAM = 4,
+ AMD_FW_PSP_SECURED_DEBUG = 9,
+ AMD_FW_PSP_TRUSTLETS = 12,
+ AMD_FW_PSP_TRUSTLETKEY = 13,
+ AMD_FW_PSP_SMU_FIRMWARE2 = 18,
+ AMD_PSP_FUSE_CHAIN = 11,
+ AMD_FW_PSP_SMUSCS = 95,
+ AMD_DEBUG_UNLOCK = 0x13,
+ AMD_WRAPPED_IKEK = 0x21,
+ AMD_TOKEN_UNLOCK = 0x22,
+ AMD_SEC_GASKET = 0x24,
+ AMD_MP2_FW = 0x25,
+ AMD_DRIVER_ENTRIES = 0x28,
+ AMD_S0I3_DRIVER = 0x2d,
+ AMD_ABL0 = 0x30,
+ AMD_ABL1 = 0x31,
+ AMD_ABL2 = 0x32,
+ AMD_ABL3 = 0x33,
+ AMD_ABL4 = 0x34,
+ AMD_ABL5 = 0x35,
+ AMD_ABL6 = 0x36,
+ AMD_ABL7 = 0x37,
+ AMD_FW_PSP_WHITELIST = 0x3a,
+ AMD_FW_L2_PTR = 0x40,
+ AMD_FW_PSP_VERSTAGE = 0x52,
+ AMD_FW_VERSTAGE_SIG = 0x53,
+ AMD_FW_IMC = 0x200, /* Large enough to be larger than the top BHD entry type. */
+ AMD_FW_GEC,
+ AMD_FW_XHCI,
+ AMD_FW_INVALID, /* Real last one to detect the last entry in table. */
+ AMD_FW_SKIP /* This is for non-applicable options. */
+} amd_fw_type;
+
+typedef enum _amd_bios_type {
+ AMD_BIOS_APCB = 0x60,
+ AMD_BIOS_APOB = 0x61,
+ AMD_BIOS_BIN = 0x62,
+ AMD_BIOS_APOB_NV = 0x63,
+ AMD_BIOS_PMUI = 0x64,
+ AMD_BIOS_PMUD = 0x65,
+ AMD_BIOS_UCODE = 0x66,
+ AMD_BIOS_APCB_BK = 0x68,
+ AMD_BIOS_MP2_CFG = 0x6a,
+ AMD_BIOS_PSP_SHARED_MEM = 0x6b,
+ AMD_BIOS_L2_PTR = 0x70,
+ AMD_BIOS_INVALID,
+ AMD_BIOS_SKIP
+} amd_bios_type;
+
+
+#define BDT_LVL1 0x1
+#define BDT_LVL2 0x2
+#define BDT_BOTH (BDT_LVL1 | BDT_LVL2)
+typedef struct _amd_bios_entry {
+ amd_bios_type type;
+ char *filename;
+ int subpr;
+ int region_type;
+ int reset;
+ int copy;
+ int ro;
+ int zlib;
+ int inst;
+ uint64_t src;
+ uint64_t dest;
+ size_t size;
+ int level;
+} amd_bios_entry;
+
+
+#define PSP_LVL1 0x1
+#define PSP_LVL2 0x2
+#define PSP_BOTH (PSP_LVL1 | PSP_LVL2)
+typedef struct _amd_fw_entry {
+ amd_fw_type type;
+ char *filename;
+ uint8_t subprog;
+ int level;
+ uint64_t other;
+} amd_fw_entry;
+
+typedef struct _amd_cb_config {
+ uint8_t have_whitelist;
+ uint8_t unlock_secure;
+ uint8_t use_secureos;
+ uint8_t load_mp2_fw;
+ uint8_t s0i3;
+} amd_cb_config;
+
+void register_fw_fuse(char *str);
+uint8_t process_config(FILE *config, amd_cb_config *cb_config, uint8_t print_deps);
+
+#define OK 0
+
+#define LINE_EOF (1)
+#define LINE_TOO_LONG (2)
+
+
+#endif /* _AMD_FW_TOOL_H_ */
diff --git a/util/amdfwtool/data_parse.c b/util/amdfwtool/data_parse.c
new file mode 100644
index 0000000..bb616d3
--- /dev/null
+++ b/util/amdfwtool/data_parse.c
@@ -0,0 +1,418 @@
+#include <stdio.h>
+#include <regex.h>
+#include <string.h>
+#include <stdlib.h>
+
+#include "amdfwtool.h"
+
+/* TODO: a empty line does not matched. */
+static const char blank_or_comment_regex[] =
+ /* a blank line */
+ "(^[[:space:]]*$)"
+ "|" /* or ... */
+ /* a line consisting of: optional whitespace followed by */
+ "(^[[:space:]]*"
+ /* a '#' character and optionally, additional characters */
+ "#.*$)";
+static regex_t blank_or_comment_expr;
+
+static const char entries_line_regex[] =
+ /* optional whitespace */
+ "^[[:space:]]*"
+ /* followed by a chunk of nonwhitespace for macro field */
+ "([^[:space:]]+)"
+ /* followed by one or more whitespace characters */
+ "[[:space:]]+"
+ /* followed by a chunk of nonwhitespace for filename field */
+ "([^[:space:]]+)"
+ /* followed by optional whitespace */
+ "[[:space:]]*$";
+static regex_t entries_line_expr;
+
+void compile_reg_expr(int cflags, const char *expr, regex_t *reg)
+{
+ static const size_t ERROR_BUF_SIZE = 256;
+ char error_msg[ERROR_BUF_SIZE];
+ int result;
+
+ result = regcomp(reg, expr, cflags);
+ if (result != 0) {
+ regerror(result, reg, error_msg, ERROR_BUF_SIZE);
+ printf("%s\n", error_msg);
+ }
+}
+
+extern amd_fw_entry amd_psp_fw_table[];
+extern amd_bios_entry amd_bios_table[];
+
+static uint8_t find_register_fw_filename_psp_dir(char *fw_name, char *filename,
+ amd_cb_config *cb_config)
+{
+ amd_fw_type fw_type = AMD_FW_INVALID;
+ amd_fw_entry *psp_tableptr;
+ uint8_t subprog;
+
+ if (strcmp(fw_name, "PSPBTLDR_WL_FILE") == 0) {
+ if (cb_config->have_whitelist == 1) {
+ fw_type = AMD_FW_PSP_BOOTLOADER;
+ subprog = 0;
+ } else {
+ fw_type = AMD_FW_SKIP;
+ }
+ } else if (strcmp(fw_name, "PSPBTLDR_FILE") == 0) {
+ if (cb_config->have_whitelist == 0) {
+ fw_type = AMD_FW_PSP_BOOTLOADER;
+ subprog = 0;
+ } else {
+ fw_type = AMD_FW_SKIP;
+ }
+ } else if (strcmp(fw_name, "AMD_PUBKEY_FILE") == 0) {
+ fw_type = AMD_FW_PSP_PUBKEY;
+ subprog = 0;
+ } else if (strcmp(fw_name, "PSPRCVR_FILE") == 0) {
+ fw_type = AMD_FW_PSP_RECOVERY;
+ subprog = 0;
+ } else if (strcmp(fw_name, "PUBSIGNEDKEY_FILE") == 0) {
+ fw_type = AMD_FW_PSP_RTM_PUBKEY;
+ subprog = 0;
+ } else if (strcmp(fw_name, "PSPNVRAM_FILE") == 0) {
+ fw_type = AMD_FW_PSP_NVRAM;
+ subprog = 0;
+ } else if (strcmp(fw_name, "SMUSCS_FILE") == 0) {
+ fw_type = AMD_FW_PSP_SMUSCS;
+ subprog = 0;
+ } else if (strcmp(fw_name, "PSPTRUSTLETS_FILE") == 0) {
+ fw_type = AMD_FW_PSP_TRUSTLETS;
+ subprog = 0;
+ } else if (strcmp(fw_name, "PSPSECUREDEBUG_FILE") == 0) {
+ fw_type = AMD_FW_PSP_SECURED_DEBUG;
+ subprog = 0;
+ } else if (strcmp(fw_name, "PSP_SMUFW1_SUB0_FILE") == 0) {
+ fw_type = AMD_FW_PSP_SMU_FIRMWARE;
+ subprog = 0;
+ } else if (strcmp(fw_name, "PSP_SMUFW1_SUB1_FILE") == 0) {
+ fw_type = AMD_FW_PSP_SMU_FIRMWARE;
+ subprog = 1;
+ } else if (strcmp(fw_name, "PSP_SMUFW1_SUB2_FILE") == 0) {
+ fw_type = AMD_FW_PSP_SMU_FIRMWARE;
+ subprog = 2;
+ } else if (strcmp(fw_name, "PSP_SMUFW2_SUB0_FILE") == 0) {
+ fw_type = AMD_FW_PSP_SMU_FIRMWARE2;
+ subprog = 0;
+ } else if (strcmp(fw_name, "PSP_SMUFW2_SUB1_FILE") == 0) {
+ fw_type = AMD_FW_PSP_SMU_FIRMWARE2;
+ subprog = 1;
+ } else if (strcmp(fw_name, "PSP_SMUFW2_SUB2_FILE") == 0) {
+ fw_type = AMD_FW_PSP_SMU_FIRMWARE2;
+ subprog = 2;
+ } else if (strcmp(fw_name, "PSP_SEC_DBG_KEY_FILE") == 0) {
+ if (cb_config->unlock_secure == 1) {
+ fw_type = AMD_FW_PSP_SECURED_DEBUG;
+ subprog = 0;
+ } else {
+ fw_type = AMD_FW_SKIP;
+ }
+ } else if (strcmp(fw_name, "PSP_SEC_DEBUG_FILE") == 0) {
+ if (cb_config->unlock_secure == 1) {
+ fw_type = AMD_DEBUG_UNLOCK;
+ subprog = 0;
+ } else {
+ fw_type = AMD_FW_SKIP;
+ }
+ } else if (strcmp(fw_name, "PSP_ABL0_FILE") == 0) {
+ fw_type = AMD_ABL0;
+ subprog = 0;
+ } else if (strcmp(fw_name, "PSP_ABL1_FILE") == 0) {
+ fw_type = AMD_ABL1;
+ subprog = 0;
+ } else if (strcmp(fw_name, "PSP_ABL2_FILE") == 0) {
+ fw_type = AMD_ABL2;
+ subprog = 0;
+ } else if (strcmp(fw_name, "PSP_ABL3_FILE") == 0) {
+ fw_type = AMD_ABL3;
+ subprog = 0;
+ } else if (strcmp(fw_name, "PSP_ABL4_FILE") == 0) {
+ fw_type = AMD_ABL4;
+ subprog = 0;
+ } else if (strcmp(fw_name, "PSP_ABL5_FILE") == 0) {
+ fw_type = AMD_ABL5;
+ subprog = 0;
+ } else if (strcmp(fw_name, "PSP_ABL6_FILE") == 0) {
+ fw_type = AMD_ABL6;
+ subprog = 0;
+ } else if (strcmp(fw_name, "PSP_ABL7_FILE") == 0) {
+ fw_type = AMD_ABL7;
+ subprog = 0;
+ } else if (strcmp(fw_name, "PSPSECUREOS_FILE") == 0) {
+ if (cb_config->use_secureos == 1) {
+ fw_type = AMD_FW_PSP_SECURED_OS;
+ subprog = 0;
+ } else {
+ fw_type = AMD_FW_SKIP;
+ }
+ } else if (strcmp(fw_name, "PSPTRUSTLETS_FILE") == 0) {
+ if (cb_config->use_secureos) {
+ fw_type = AMD_FW_PSP_TRUSTLETS;
+ subprog = 0;
+ } else {
+ fw_type = AMD_FW_SKIP;
+ }
+ } else if (strcmp(fw_name, "TRUSTLETKEY_FILE") == 0) {
+ if (cb_config->use_secureos) {
+ fw_type = AMD_FW_PSP_TRUSTLETKEY;
+ subprog = 0;
+ } else {
+ fw_type = AMD_FW_SKIP;
+ }
+ } else if (strcmp(fw_name, "PSP_IKEK_FILE") == 0) {
+ fw_type = AMD_WRAPPED_IKEK;
+ subprog = 0;
+ } else if (strcmp(fw_name, "PSP_SECG1_FILE") == 0) {
+ fw_type = AMD_SEC_GASKET;
+ subprog = 1;
+ } else if (strcmp(fw_name, "PSP_SECG2_FILE") == 0) {
+ fw_type = AMD_SEC_GASKET;
+ subprog = 2;
+ } else if (strcmp(fw_name, "PSP_MP2FW1_FILE") == 0) {
+ if (cb_config->load_mp2_fw == 1) {
+ fw_type = AMD_MP2_FW;
+ subprog = 1;
+ } else {
+ fw_type = AMD_FW_SKIP;
+ }
+ } else if (strcmp(fw_name, "PSP_MP2FW2_FILE") == 0) {
+ if (cb_config->load_mp2_fw == 1) {
+ fw_type = AMD_MP2_FW;
+ subprog = 2;
+ } else {
+ fw_type = AMD_FW_SKIP;
+ }
+ } else if (strcmp(fw_name, "PSP_MP2CFG_FILE") == 0) {
+ if (cb_config->load_mp2_fw == 1) {
+ fw_type = AMD_BIOS_MP2_CFG;
+ subprog = 0;
+ } else {
+ fw_type = AMD_FW_SKIP;
+ }
+ } else if (strcmp(fw_name, "PSP_DRIVERS_FILE") == 0) {
+ fw_type = AMD_DRIVER_ENTRIES;
+ subprog = 0;
+ } else if (strcmp(fw_name, "PSP_S0I3_FILE") == 0) {
+ if (cb_config->s0i3 == 1) {
+ fw_type = AMD_S0I3_DRIVER;
+ subprog = 0;
+ } else {
+ fw_type = AMD_FW_SKIP;
+ }
+ } else {
+ fw_type = AMD_FW_INVALID;
+ /* TODO: Add more */
+ }
+ /* Search and fill the filename */
+ psp_tableptr = &amd_psp_fw_table[0];
+ if (fw_type != AMD_FW_SKIP && fw_type != AMD_FW_INVALID) {
+ while (psp_tableptr->type != AMD_FW_INVALID) {
+ /* instance are not used in PSP table */
+ if (psp_tableptr->type == fw_type && psp_tableptr->subprog == subprog) {
+ psp_tableptr->filename = filename;
+ break;
+ }
+ psp_tableptr++;
+ }
+ }
+ if (fw_type == AMD_FW_INVALID)
+ return 0;
+ else
+ return 1;
+}
+
+static uint8_t find_register_fw_filename_bios_dir(char *fw_name, char *filename,
+ amd_cb_config *cb_config)
+{
+ amd_bios_type fw_type = AMD_BIOS_INVALID;
+ amd_bios_entry *bhd_tableptr;
+ uint8_t subprog, instance = 0;
+
+ (void) (cb_config); /* Remove warning and reserved for future. */
+
+ if (strcmp(fw_name, "PSP_PMUI_FILE1") == 0) {
+ fw_type = AMD_BIOS_PMUI;
+ subprog = 0;
+ instance = 1;
+ } else if (strcmp(fw_name, "PSP_PMUI_FILE2") == 0) {
+ fw_type = AMD_BIOS_PMUI;
+ subprog = 0;
+ instance = 4;
+ } else if (strcmp(fw_name, "PSP_PMUI_FILE3") == 0) {
+ fw_type = AMD_BIOS_PMUI;
+ subprog = 1;
+ instance = 1;
+ } else if (strcmp(fw_name, "PSP_PMUI_FILE4") == 0) {
+ fw_type = AMD_BIOS_PMUI;
+ subprog = 1;
+ instance = 4;
+ } else if (strcmp(fw_name, "PSP_PMUD_FILE1") == 0) {
+ fw_type = AMD_BIOS_PMUD;
+ subprog = 0;
+ instance = 1;
+ } else if (strcmp(fw_name, "PSP_PMUD_FILE2") == 0) {
+ fw_type = AMD_BIOS_PMUD;
+ subprog = 0;
+ instance = 4;
+ } else if (strcmp(fw_name, "PSP_PMUD_FILE3") == 0) {
+ fw_type = AMD_BIOS_PMUD;
+ subprog = 1;
+ instance = 1;
+ } else if (strcmp(fw_name, "PSP_PMUD_FILE4") == 0) {
+ fw_type = AMD_BIOS_PMUD;
+ subprog = 1;
+ instance = 4;
+ } else {
+ fw_type = AMD_BIOS_INVALID;
+ }
+
+ bhd_tableptr = amd_bios_table;
+
+ if (fw_type != AMD_BIOS_INVALID && fw_type != AMD_BIOS_SKIP) {
+ while (bhd_tableptr->type != AMD_BIOS_INVALID) {
+ if (bhd_tableptr->type == fw_type &&
+ bhd_tableptr->subpr == subprog &&
+ bhd_tableptr->inst == instance) {
+ bhd_tableptr->filename = filename;
+ break;
+ }
+ bhd_tableptr++;
+ }
+ }
+ if (fw_type == AMD_BIOS_INVALID)
+ return 0;
+ else
+ return 1;
+}
+
+#define MAX_LINE_SIZE 1024
+
+int get_input_file_line(FILE *f, char line[], int line_buf_size)
+{
+ if (fgets(line, line_buf_size, f) == NULL)
+ return LINE_EOF;
+
+ /* If the file contains a line that is too long, then it's best
+ * to let the user know right away rather than passing back a
+ * truncated result that will lead to problems later on.
+ */
+ line[strlen(line) - 1] = '\0';
+
+ if (strlen(line) == ((size_t) (line_buf_size - 1))) {
+ printf("The line size in config file should be lower than %d bytes.\n",
+ MAX_LINE_SIZE);
+ exit(1);
+ }
+
+ return OK;
+}
+
+static int is_valid_entry(char *oneline, regmatch_t *match)
+{
+ int retval;
+
+ if (regexec(&entries_line_expr, oneline, 3, match, 0) == 0) {
+ oneline[match[1].rm_eo] = '\0';
+ oneline[match[2].rm_eo] = '\0';
+ retval = 1;
+ } else
+ retval = 0;
+
+ return retval;
+}
+
+static int skip_comment_blank_line(char *oneline)
+{
+ int retval;
+
+ if (regexec(&blank_or_comment_expr, oneline, 0, NULL, 0) == 0) {
+ /* skip comment and blank */
+ retval = 1;
+ } else {
+ /* no match */
+ retval = 0;
+ }
+
+ return retval;
+}
+
+#define N_MATCHES 4
+/*
+ return value:
+ 0: The config file can not be parsed correctly.
+ 1: The config file can be parsed correctly.
+ */
+uint8_t process_config(FILE *config, amd_cb_config *cb_config, uint8_t print_deps)
+{
+ char oneline[MAX_LINE_SIZE], *path_filename;
+ regmatch_t match[N_MATCHES];
+ char dir[MAX_LINE_SIZE] = {'\0'};
+
+ compile_reg_expr(REG_EXTENDED | REG_NEWLINE,
+ blank_or_comment_regex, &blank_or_comment_expr);
+ compile_reg_expr(REG_EXTENDED | REG_NEWLINE,
+ entries_line_regex, &entries_line_expr);
+
+ /* Get a line */
+ /* Get FIRMWARE_LOCATE in the first loop */
+ while (get_input_file_line(config, oneline, MAX_LINE_SIZE) == OK) {
+ /* get a line */
+ if (skip_comment_blank_line(oneline))
+ continue;
+ if (is_valid_entry(oneline, match)) {
+ if (strcmp(&(oneline[match[1].rm_so]), "FIRMWARE_LOCATE") == 0) {
+ strcpy(dir, &(oneline[match[2].rm_so]));
+ break;
+ }
+ }
+ }
+
+ if (dir[0] == '\0') {
+ fprintf(stderr, "No line with FIRMWARE_LOCATION\n");
+ return 0;
+ }
+
+ fseek(config, 0, SEEK_SET);
+ /* Get a line */
+ while (get_input_file_line(config, oneline, MAX_LINE_SIZE) == OK) {
+ /* get a line */
+ if (skip_comment_blank_line(oneline))
+ continue;
+ if (is_valid_entry(oneline, match)) {
+ if (strcmp(&(oneline[match[1].rm_so]), "FIRMWARE_LOCATE") == 0) {
+ continue;
+ } else {
+ path_filename = malloc(MAX_LINE_SIZE);
+ strcpy(path_filename, dir);
+ strcat(path_filename, "/");
+ strcat(path_filename, &(oneline[match[2].rm_so]));
+
+ if (find_register_fw_filename_psp_dir(
+ &(oneline[match[1].rm_so]),
+ path_filename, cb_config) == 0) {
+ if (find_register_fw_filename_bios_dir(
+ &(oneline[match[1].rm_so]),
+ path_filename, cb_config) == 0) {
+ fprintf(stderr, "Module's name \"%s\" is not valid\n", oneline);
+ return 0; /* Stop parsing. */
+ } else {
+ if (print_deps)
+ printf(" %s ", path_filename);
+ }
+ } else {
+ if (print_deps)
+ printf(" %s ", path_filename);
+ }
+ }
+ } else {
+ fprintf(stderr, "AMDFWTOOL config file line can't be parsed \"%s\"\n", oneline);
+ return 0;
+ }
+ }
+ return 1;
+}

To view, visit change 42859. To unsubscribe, or for help writing mail filters, visit settings.

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Icae73d0730106aab687486e555ba947796e5e757
Gerrit-Change-Number: 42859
Gerrit-PatchSet: 69
Gerrit-Owner: Bao Zheng <fishbaozi@gmail.com>
Gerrit-Reviewer: Dave Frodin <dave.frodin@se-eng.com>
Gerrit-Reviewer: Felix Held <felix-coreboot@felixheld.de>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk@gmail.com>
Gerrit-Reviewer: Justin Frodsham <justin.frodsham@protonmail.com>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd@gmail.com>
Gerrit-Reviewer: Martin Roth <martinroth@google.com>
Gerrit-Reviewer: Matt Papageorge <matthewpapa07@gmail.com>
Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-Reviewer: Zheng Bao
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: merged