Patrick Rudolph has uploaded this change for review.

View Change

cpu/intel/common: Move intel_ht_sibling() to common folder

Make intel_ht_sibling() available on all platforms.

Will be used in MP init to only write "Core" MSRs from one thread
on HyperThreading enabled platforms, to prevent raceconditions and
resulting #GP if MSRs are written twice or are already locked.

Change-Id: I5d000b34ba4c6536dc866fbaf106b78e905e3e35
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
M src/cpu/intel/common/Kconfig
M src/cpu/intel/common/Makefile.inc
M src/cpu/intel/common/common.h
A src/cpu/intel/common/hyperthreading.c
M src/cpu/intel/hyperthreading/intel_sibling.c
M src/cpu/intel/model_f2x/Kconfig
M src/cpu/intel/model_f2x/model_f2x_init.c
M src/cpu/intel/model_f3x/Kconfig
M src/cpu/intel/model_f3x/model_f3x_init.c
M src/include/cpu/intel/hyperthreading.h
10 files changed, 60 insertions(+), 25 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/35619/1
diff --git a/src/cpu/intel/common/Kconfig b/src/cpu/intel/common/Kconfig
index 4074d8c..4fa3aff 100644
--- a/src/cpu/intel/common/Kconfig
+++ b/src/cpu/intel/common/Kconfig
@@ -22,4 +22,7 @@
config CPU_INTEL_COMMON_TIMEBASE
bool

+config CPU_INTEL_COMMON_HYPERTHREADING
+ bool
+
endif
diff --git a/src/cpu/intel/common/Makefile.inc b/src/cpu/intel/common/Makefile.inc
index c38e81c..0a84deb 100644
--- a/src/cpu/intel/common/Makefile.inc
+++ b/src/cpu/intel/common/Makefile.inc
@@ -1,4 +1,5 @@
ramstage-y += common_init.c
+ramstage-$(CONFIG_CPU_INTEL_COMMON_HYPERTHREADING) += hyperthreading.c

ifeq ($(CONFIG_CPU_INTEL_COMMON_TIMEBASE),y)
bootblock-y += fsb.c
diff --git a/src/cpu/intel/common/common.h b/src/cpu/intel/common/common.h
index b9ac056..480dfe6 100644
--- a/src/cpu/intel/common/common.h
+++ b/src/cpu/intel/common/common.h
@@ -27,4 +27,9 @@
struct cppc_config;
void cpu_init_cppc_config(struct cppc_config *config, u32 version);

+/*
+ * Returns true if it's not threat 0 on a hyperthreading enabled core.
+ */
+bool intel_ht_sibling(void);
+
#endif
diff --git a/src/cpu/intel/common/hyperthreading.c b/src/cpu/intel/common/hyperthreading.c
new file mode 100644
index 0000000..a1ac457
--- /dev/null
+++ b/src/cpu/intel/common/hyperthreading.c
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <cpu/x86/lapic.h>
+#include <cpu/intel/common/common.h>
+#include <arch/cpu.h>
+
+/* Return true if running thread does not have the smallest lapic ID
+ * within a CPU core.
+ */
+bool intel_ht_sibling(void)
+{
+ struct cpuid_result result;
+ unsigned int core_ids, apic_ids, threads;
+
+ result = cpuid(1);
+ /* Is hyperthreading supported */
+ if (!(result.edx & (1 << 28)))
+ return 0;
+
+ apic_ids = 1;
+ if (cpuid_eax(0) >= 1)
+ apic_ids = (cpuid_ebx(1) >> 16) & 0xff;
+ if (apic_ids < 1)
+ apic_ids = 1;
+
+ core_ids = 1;
+ if (cpuid_eax(0) >= 4) {
+ result = cpuid_ext(4, 0);
+ core_ids += (result.eax >> 26) & 0x3f;
+ }
+
+ threads = (apic_ids / core_ids);
+ return !!(lapicid() & (threads-1));
+}
diff --git a/src/cpu/intel/hyperthreading/intel_sibling.c b/src/cpu/intel/hyperthreading/intel_sibling.c
index 3c3e53a..f5bcc87 100644
--- a/src/cpu/intel/hyperthreading/intel_sibling.c
+++ b/src/cpu/intel/hyperthreading/intel_sibling.c
@@ -25,30 +25,6 @@
static int first_time = 1;
static int disable_siblings = !CONFIG(LOGICAL_CPUS);

-/* Return true if running thread does not have the smallest lapic ID
- * within a CPU core.
- */
-int intel_ht_sibling(void)
-{
- unsigned int core_ids, apic_ids, threads;
-
- apic_ids = 1;
- if (cpuid_eax(0) >= 1)
- apic_ids = (cpuid_ebx(1) >> 16) & 0xff;
- if (apic_ids < 1)
- apic_ids = 1;
-
- core_ids = 1;
- if (cpuid_eax(0) >= 4) {
- struct cpuid_result result;
- result = cpuid_ext(4, 0);
- core_ids += (result.eax >> 26) & 0x3f;
- }
-
- threads = (apic_ids / core_ids);
- return !!(lapicid() & (threads-1));
-}
-
void intel_sibling_init(struct device *cpu)
{
unsigned int i, siblings;
diff --git a/src/cpu/intel/model_f2x/Kconfig b/src/cpu/intel/model_f2x/Kconfig
index 9e70775..dcf9441 100644
--- a/src/cpu/intel/model_f2x/Kconfig
+++ b/src/cpu/intel/model_f2x/Kconfig
@@ -7,3 +7,5 @@
select SMP
select SUPPORT_CPU_UCODE_IN_CBFS
select SMM_ASEG
+ select CPU_INTEL_COMMON
+ select CPU_INTEL_COMMON_HYPERTHREADING
diff --git a/src/cpu/intel/model_f2x/model_f2x_init.c b/src/cpu/intel/model_f2x/model_f2x_init.c
index e759a43..04710a9 100644
--- a/src/cpu/intel/model_f2x/model_f2x_init.c
+++ b/src/cpu/intel/model_f2x/model_f2x_init.c
@@ -17,6 +17,7 @@
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/hyperthreading.h>
+#include <cpu/intel/common/common.h>
#include <cpu/x86/cache.h>

static void model_f2x_init(struct device *cpu)
diff --git a/src/cpu/intel/model_f3x/Kconfig b/src/cpu/intel/model_f3x/Kconfig
index 7eaa820..9a5e2a1 100644
--- a/src/cpu/intel/model_f3x/Kconfig
+++ b/src/cpu/intel/model_f3x/Kconfig
@@ -6,3 +6,5 @@
select ARCH_RAMSTAGE_X86_32
select SMP
select SUPPORT_CPU_UCODE_IN_CBFS
+ select CPU_INTEL_COMMON
+ select CPU_INTEL_COMMON_HYPERTHREADING
diff --git a/src/cpu/intel/model_f3x/model_f3x_init.c b/src/cpu/intel/model_f3x/model_f3x_init.c
index d348df6..48e3872 100644
--- a/src/cpu/intel/model_f3x/model_f3x_init.c
+++ b/src/cpu/intel/model_f3x/model_f3x_init.c
@@ -17,6 +17,7 @@
#include <cpu/x86/lapic.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/hyperthreading.h>
+#include <cpu/intel/common/common.h>
#include <cpu/x86/cache.h>

static void model_f3x_init(struct device *cpu)
diff --git a/src/include/cpu/intel/hyperthreading.h b/src/include/cpu/intel/hyperthreading.h
index c84a6a7..0a1461c 100644
--- a/src/include/cpu/intel/hyperthreading.h
+++ b/src/include/cpu/intel/hyperthreading.h
@@ -3,6 +3,5 @@

struct device;
void intel_sibling_init(struct device *cpu);
-int intel_ht_sibling(void);

#endif /* CPU_INTEL_HYPERTHREADING_H */

To view, visit change 35619. To unsubscribe, or for help writing mail filters, visit settings.

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I5d000b34ba4c6536dc866fbaf106b78e905e3e35
Gerrit-Change-Number: 35619
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Rudolph <patrick.rudolph@9elements.com>
Gerrit-Reviewer: Martin Roth <martinroth@google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph@9elements.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-MessageType: newchange