Arthur Heymans has uploaded this change for review.

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[TESTME]AGESA: Try to fix S3 resume on CONFIG_NO_STAGE_CACHE

TODO: What MTRR's does AGESA set up on the s3 resume path?

Change-Id: I8f9d9d4c0116c965570e289a0b0df7d5f739acde
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
---
M src/cpu/amd/agesa/Kconfig
M src/drivers/amd/agesa/mtrr_fixme.c
2 files changed, 1 insertion(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/37180/1

diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig
index ddfe707..84fcaef 100644
--- a/src/cpu/amd/agesa/Kconfig
+++ b/src/cpu/amd/agesa/Kconfig
@@ -26,7 +26,6 @@
 	select UDELAY_LAPIC
 	select LAPIC_MONOTONIC_TIMER
 	select SPI_FLASH if HAVE_ACPI_RESUME
-	select CBMEM_STAGE_CACHE if HAVE_ACPI_RESUME
 	select SMM_ASEG
 	select NO_FIXED_XIP_ROM_SIZE
 
diff --git a/src/drivers/amd/agesa/mtrr_fixme.c b/src/drivers/amd/agesa/mtrr_fixme.c
index bbb9eb0..37795e9 100644
--- a/src/drivers/amd/agesa/mtrr_fixme.c
+++ b/src/drivers/amd/agesa/mtrr_fixme.c
@@ -48,7 +48,7 @@
 
 void fixup_cbmem_to_UC(int s3resume)
 {
-	if (s3resume)
+	if (s3resume && !CONFIG(NO_STAGE_CACHE))
 		return;
 
 	/* For normal path, INIT_POST has returned with all

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