Dinesh Gehlot has uploaded this change for review.

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soc/intel/tgl: Rename ME header with spec version and place it to common

Tigerlake based SoCs uses Intel's Management Engine (ME), version 15.
This patch renames the ME header file to 'me_15.h' and moves the renamed
header to common code.

Including the ME specification in common code will help current and
future SoC platforms to select the correct version based on the
applicable configuration. It might be also beneficial if two different
SoC platforms would like to use the same ME specification and not
necessarily share the same SoC directory.

BUG=b:260309647

Signed-off-by: Dinesh Gehlot <digehlot@google.com>
Change-Id: Iaeb342049f0b3873b9f1b0f9e289611f3e30dad7
---
M src/soc/intel/common/block/cse/Kconfig
M src/soc/intel/common/block/include/intelblocks/me.h
R src/soc/intel/common/block/include/intelblocks/me_15.h
M src/soc/intel/tigerlake/Kconfig
M src/soc/intel/tigerlake/me.c
5 files changed, 33 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/72954/1
diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig
index 8e9c88f..991fe6c 100644
--- a/src/soc/intel/common/block/cse/Kconfig
+++ b/src/soc/intel/common/block/cse/Kconfig
@@ -206,6 +206,12 @@
help
Use this option for CSE FW Update when compressed blobs are used.

+config SOC_INTEL_COMMON_BLOCK_ME_SPEC_15
+ bool
+ help
+ This config will enable 'ME specification version 15'. It will ensure ME specific
+ declaration and uses of required data structures for Host firmware status registers.
+
config SOC_INTEL_COMMON_BLOCK_ME_SPEC_16
bool
help
diff --git a/src/soc/intel/common/block/include/intelblocks/me.h b/src/soc/intel/common/block/include/intelblocks/me.h
index e82258e..08ae06f 100644
--- a/src/soc/intel/common/block/include/intelblocks/me.h
+++ b/src/soc/intel/common/block/include/intelblocks/me.h
@@ -5,7 +5,9 @@

#include <stdint.h>

-#if CONFIG(SOC_INTEL_COMMON_BLOCK_ME_SPEC_16)
+#if CONFIG(SOC_INTEL_COMMON_BLOCK_ME_SPEC_15)
+#include "me_15.h"
+#elif CONFIG(SOC_INTEL_COMMON_BLOCK_ME_SPEC_16)
#include "me_16.h"
#elif CONFIG(SOC_INTEL_COMMON_BLOCK_ME_SPEC_18)
#include "me_18.h"
diff --git a/src/soc/intel/tigerlake/include/soc/me.h b/src/soc/intel/common/block/include/intelblocks/me_15.h
similarity index 100%
rename from src/soc/intel/tigerlake/include/soc/me.h
rename to src/soc/intel/common/block/include/intelblocks/me_15.h
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index 9151450..788ee51 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -66,6 +66,7 @@
select SOC_INTEL_COMMON_BLOCK_HDA
select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC
select SOC_INTEL_COMMON_BLOCK_IRQ
+ select SOC_INTEL_COMMON_BLOCK_ME_SPEC_15
select SOC_INTEL_COMMON_BLOCK_MEMINIT
select SOC_INTEL_COMMON_BLOCK_PCIE_RTD3
select SOC_INTEL_COMMON_BLOCK_PMC_EPOC
diff --git a/src/soc/intel/tigerlake/me.c b/src/soc/intel/tigerlake/me.c
index e953844..e24a1f7 100644
--- a/src/soc/intel/tigerlake/me.c
+++ b/src/soc/intel/tigerlake/me.c
@@ -2,8 +2,8 @@

#include <bootstate.h>
#include <console/console.h>
+#include <intelblocks/me.h>
#include <intelblocks/cse.h>
-#include <soc/me.h>
#include <types.h>

static void dump_me_status(void *unused)

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iaeb342049f0b3873b9f1b0f9e289611f3e30dad7
Gerrit-Change-Number: 72954
Gerrit-PatchSet: 1
Gerrit-Owner: Dinesh Gehlot <digehlot@google.com>
Gerrit-MessageType: newchange