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• File src/mainboard/google/mancomb/variants/baseboard/amdfw.cfg:

  • Patch Set #1, Line 37:

    PSP_PMUI_FILE1  TypeId0x65_Appb_CZN_1D_Ddr4_Udimm_Dmem.csbin
    PSP_PMUD_FILE2  TypeId0x64_Appb_CZN_2D_Ddr4_Udimm_Imem.csbin
    

    It looks like you transposed the I and D in col. 8, comparing to soc//cezanne. […]

    It should like below.
    PSP_PMUI_FILE1 TypeId0x64_Appb_CZN_1D_Ddr4_Udimm_Imem.csbin
    PSP_PMUD_FILE1 TypeId0x65_Appb_CZN_1D_Ddr4_Udimm_Dmem.csbin
    PSP_PMUI_FILE2 TypeId0x64_Appb_CZN_2D_Ddr4_Udimm_Imem.csbin
    PSP_PMUD_FILE2 TypeId0x65_Appb_CZN_2D_Ddr4_Udimm_Dmem.csbin

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