Srinidhi N Kaushik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38464 )
Change subject: soc/intel/tigerlake: Update Native PinMux Policy ......................................................................
soc/intel/tigerlake: Update Native PinMux Policy
Set the initial FSPM Native PinMux policy to avoid FSP Assert.
Signed-off-by: Srinidhi N Kaushik srinidhi.n.kaushik@intel.com Change-Id: Iee1f5ade75ec72853c9badd0c5cfd676f26b0812 --- M src/soc/intel/tigerlake/romstage/fsp_params_tgl.c 1 file changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/38464/1
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c b/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c index 388ac42..7510d81 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params_tgl.c @@ -91,6 +91,15 @@ m_cfg->SmbusEnable = config->SmbusEnable; /* Set debug probe type */ m_cfg->PlatformDebugConsent = config->DebugConsent; + + /* Set initial PinMux Policy */ + m_cfg->PchHdaAudioLinkDmicClkAPinMux[0] = GPIO_VER2_LP_MUXING_DMIC0_CLKA_GPP_S6; + m_cfg->PchHdaAudioLinkDmicClkBPinMux[0] = GPIO_VER2_LP_MUXING_DMIC0_CLKB_GPP_S2; + m_cfg->PchHdaAudioLinkDmicDataPinMux[0] = GPIO_VER2_LP_MUXING_DMIC0_DATA_GPP_S7; + m_cfg->PchHdaAudioLinkDmicClkAPinMux[1] = GPIO_VER2_LP_MUXING_DMIC1_CLKA_GPP_S4; + m_cfg->PchHdaAudioLinkDmicClkBPinMux[1] = GPIO_VER2_LP_MUXING_DMIC1_CLKB_GPP_S3; + m_cfg->PchHdaAudioLinkDmicDataPinMux[1] = GPIO_VER2_LP_MUXING_DMIC1_DATA_GPP_S5; + }
void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)