Attention is currently required from: Felix Singer, Tim Wawrzynczak, Subrata Banik, Usha P, Patrick Rudolph, EricR Lai.
Usha P uploaded patch set #5 to the change originally created by Angel Pons.
soc/intel/alderlake: Add Kconfigs for all PCH types
The Alder Lake code currently supports the PCH-M and PCH-P types, which
have some differences (so far, only the amount of PCIe I/O). Mainboards
can use the `SOC_INTEL_ALDERLAKE_PCH_M` Kconfig option to specify which
PCH type they use: select the option to choose PCH-M, do not select the
option to choose PCH-P. While this works, it can be confusing once more
PCH types are added.
Introduce the `SOC_INTEL_ALDERLAKE_PCH_P` Kconfig option so that boards
have to explicitly choose a PCH type. Also, use this option to restrict
the PCH-P defaults for PCH-dependent settings to avoid unintended reuse
of the PCH-P defaults when adding a new PCH type. To make sure only one
PCH type is selected, add some preprocessor in `bootblock.h` to provoke
a build-time error if this requirement is not met. Kconfig doesn't seem
to have a mechanism to describe sets of mutually-exclusive bool options
that allows said options to be selected (a `choice` block doesn't allow
its elements to be selected). Finally, adapt the ADL boards accordingly.
Change-Id: I7deca820e08ce2b5a220f3c97a511a4f3464a976
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/mainboard/google/brya/Kconfig
M src/mainboard/intel/adlrvp/Kconfig
M src/mainboard/intel/shadowmountain/Kconfig
M src/soc/intel/alderlake/Kconfig
M src/soc/intel/alderlake/include/soc/bootblock.h
5 files changed, 26 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/59804/5
To view, visit change 59804. To unsubscribe, or for help writing mail filters, visit settings.