Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/24999
Change subject: soc/amd/stoneyridge: Create a HALT_THIS_AP callout ......................................................................
soc/amd/stoneyridge: Create a HALT_THIS_AP callout
It was required for all cores use the same CAR teardown function (exit_car.S and gcccar.inc). AGESA has already been modified to do the AP to do the call out. Create assembly code to call chipset_teardown_car and then enter an endless loop with halt instruction. Then create the call out that will call this new assembly code.
BUG=b:70338633 TEST=Created a debug version of AGESA that would print the returned status of HALT_THIS_AP. Build code without the fix, see the return. Build code with the fix, see that there's no return.
Change-Id: I05ee405812211d93dfdbdc5ee7d9978c2eb585e1 Signed-off-by: Richard Spiegel richard.spiegel@silverbackltd.com --- M src/soc/amd/common/block/cpu/Makefile.inc A src/soc/amd/common/block/cpu/car/ap_exit_car.S M src/soc/amd/common/block/include/amdblocks/BiosCallOuts.h A src/soc/amd/common/block/include/amdblocks/car.h M src/soc/amd/common/block/pi/def_callouts.c M src/soc/amd/stoneyridge/BiosCallOuts.c M src/vendorcode/amd/pi/00670F00/AGESA.h 7 files changed, 108 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/24999/1
diff --git a/src/soc/amd/common/block/cpu/Makefile.inc b/src/soc/amd/common/block/cpu/Makefile.inc index ecc9afbc..fed208a 100644 --- a/src/soc/amd/common/block/cpu/Makefile.inc +++ b/src/soc/amd/common/block/cpu/Makefile.inc @@ -1,3 +1,7 @@ bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_CAR) += car/cache_as_ram.S +bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_CAR) += car/ap_exit_car.S +bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_CAR) += car/exit_car.S + postcar-$(CONFIG_SOC_AMD_COMMON_BLOCK_CAR) += car/exit_car.S + romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_CAR) += car/exit_car.S diff --git a/src/soc/amd/common/block/cpu/car/ap_exit_car.S b/src/soc/amd/common/block/cpu/car/ap_exit_car.S new file mode 100644 index 0000000..82d3413 --- /dev/null +++ b/src/soc/amd/common/block/cpu/car/ap_exit_car.S @@ -0,0 +1,47 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +.code32 + +#include <cpu/x86/cr.h> + +.globl ap_teardown_car +ap_teardown_car: + pop %edi /* return address */ + pop %esi /* flags */ + + /* chipset_teardown_car() is expected to disable cache-as-ram. */ + call chipset_teardown_car + + /* + * Check flags requirements (0 = FALSE, 1 = TRUE) : + * bit 0 = ExecWbinvd + * bit 1 = CacheEn + */ + + test %esi, 1 + jz 1f + wbinvd +1: + test %esi, 2 + jz 2f + /* Enable cache */ + mov %cr0, %eax + and $(~(CR0_CD | CR0_NW)), %eax + mov %eax, %cr0 +2: + cli + hlt + jmp 2b diff --git a/src/soc/amd/common/block/include/amdblocks/BiosCallOuts.h b/src/soc/amd/common/block/include/amdblocks/BiosCallOuts.h index e061c63..34131cf 100644 --- a/src/soc/amd/common/block/include/amdblocks/BiosCallOuts.h +++ b/src/soc/amd/common/block/include/amdblocks/BiosCallOuts.h @@ -57,6 +57,7 @@
AGESA_STATUS agesa_fch_initreset(UINT32 Func, UINTN FchData, VOID *ConfigPtr); AGESA_STATUS agesa_fch_initenv(UINT32 Func, UINTN FchData, VOID *ConfigPtr); +AGESA_STATUS agesa_HaltThisAp(UINT32 Func, UINTN Data, VOID *ConfigPtr);
void platform_FchParams_reset(FCH_RESET_DATA_BLOCK *FchParams_reset); void platform_FchParams_env(FCH_DATA_BLOCK *FchParams_env); diff --git a/src/soc/amd/common/block/include/amdblocks/car.h b/src/soc/amd/common/block/include/amdblocks/car.h new file mode 100644 index 0000000..60e7c6e --- /dev/null +++ b/src/soc/amd/common/block/include/amdblocks/car.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018 Advanced Micro Devices, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __AMD_CAR_H__ +#define __AMD_CAR_H__ + +void ap_teardown_car(uint32_t flags); + +#endif /* __AMD_CAR_H__ */ diff --git a/src/soc/amd/common/block/pi/def_callouts.c b/src/soc/amd/common/block/pi/def_callouts.c index c05d4de..31992e1 100644 --- a/src/soc/amd/common/block/pi/def_callouts.c +++ b/src/soc/amd/common/block/pi/def_callouts.c @@ -29,6 +29,7 @@ const BIOS_CALLOUT_STRUCT BiosCallouts[] = { { AGESA_DO_RESET, agesa_Reset }, { AGESA_FCH_OEM_CALLOUT, agesa_fch_initreset }, + { AGESA_HALT_THIS_AP, agesa_HaltThisAp }, { AGESA_GNB_PCIE_SLOT_RESET, agesa_PcieSlotResetControl } }; #else diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c index 4ddcedc..f30ed3c 100644 --- a/src/soc/amd/stoneyridge/BiosCallOuts.c +++ b/src/soc/amd/stoneyridge/BiosCallOuts.c @@ -26,6 +26,7 @@ #include <amdlib.h> #include <amdblocks/dimm_spd.h> #include "chip.h" +#include <amdblocks/car.h>
void __attribute__((weak)) platform_FchParams_reset( FCH_RESET_DATA_BLOCK *FchParams_reset) {} @@ -139,6 +140,24 @@ return AGESA_SUCCESS; }
+AGESA_STATUS agesa_HaltThisAp(UINT32 Func, UINTN Data, VOID *ConfigPtr) +{ + AGESA_HALT_THIS_AP_PARAMS *info = ConfigPtr; + uint32_t flags = 0; + + if (info->PrimaryCore == TRUE) + return AGESA_UNSUPPORTED; /* force normal path */ + if (info->ExecWbinvd == TRUE) + flags |= 1; + if (info->CacheEn == TRUE) + flags |= 2; + + ap_teardown_car(flags); /* does not return */ + + /* Should never reach here */ + return AGESA_UNSUPPORTED; +} + /* Allow mainboards to fill the SPD buffer */ __attribute__((weak)) int mainboard_read_spd(uint8_t spdAddress, char *buf, size_t len) diff --git a/src/vendorcode/amd/pi/00670F00/AGESA.h b/src/vendorcode/amd/pi/00670F00/AGESA.h index 17f6986..dc248dd 100644 --- a/src/vendorcode/amd/pi/00670F00/AGESA.h +++ b/src/vendorcode/amd/pi/00670F00/AGESA.h @@ -67,6 +67,7 @@ #define AGESA_RUNFUNC_ON_ALL_APS 0x00028106ul #define AGESA_IDLE_AN_AP 0x00028107ul #define AGESA_WAIT_FOR_ALL_APS 0x00028108ul +#define AGESA_HALT_THIS_AP 0x00028109ul
// AGESA ADVANCED CALLOUTS, Memory #define AGESA_READ_SPD 0x00028140ul @@ -2514,6 +2515,14 @@ IN OUT MEM_DATA_STRUCT *MemData; ///< Location of the MemData structure, for reference } AGESA_READ_SPD_PARAMS;
+/// Parameters structure for the interface call-out AGESA_HALT_THIS_AP +typedef struct { + IN OUT AMD_CONFIG_PARAMS StdHeader; + IN BOOLEAN ExecWbinvd; + IN BOOLEAN PrimaryCore; + IN BOOLEAN CacheEn; +} AGESA_HALT_THIS_AP_PARAMS; + /// VoltageType values typedef enum { VTYPE_CPU_VREF, ///< Cpu side Vref @@ -2625,6 +2634,12 @@ );
AGESA_STATUS +AgesaHaltThisAp( + IN UINTN FcnData, + IN AGESA_HALT_THIS_AP_PARAMS *HaltApParams +); + +AGESA_STATUS AgesaHookBeforeDramInit ( IN UINTN SocketIdModuleId, IN OUT MEM_DATA_STRUCT *MemData