Marshall Dawson has uploaded this change for review.
soc/amd/common: Add S3 region to Kconfig
Add the symbols back to Kconfig and make the S3 base and offset
depend on HAVE_ACPI_RESUME. These will form the "backup" region
for storing S3 data. The values are typical for AMD platforms and
should allow adequate room for rotation (the Stoney Ridge NV size
is 0x4c1 currently).
Note that the primary choice for the S3 save location will be
eventually be determined by the FMAP.
Change-Id: I67846e47d364ecfc01934e879e3299813fcda1b3
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
---
M src/soc/amd/common/Kconfig
1 file changed, 20 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/22642/1
diff --git a/src/soc/amd/common/Kconfig b/src/soc/amd/common/Kconfig
index debedac..33713f9 100644
--- a/src/soc/amd/common/Kconfig
+++ b/src/soc/amd/common/Kconfig
@@ -11,4 +11,24 @@
source "src/soc/amd/common/block/Kconfig"
+config S3_DATA_POS
+ hex
+ depends on HAVE_ACPI_RESUME
+ default 0xffff0000
+ help
+ For designs not using a flash map, this is the physical address where
+ S3 resume data is stored in the SPI flash. Place this on a 4KB
+ boundary for best results. The designer must ensure the region does
+ not interfere with anything else in the image.
+
+config S3_DATA_SIZE
+ int
+ depends on HAVE_ACPI_RESUME
+ default 32768
+ help
+ For designs not using a flash map, this is the total size of the
+ region to be used for S3 resume data in the SPI flash. Make this
+ a multiple of 4KB for best results. The designer must ensure the
+ region does not interfere with anything else in the image.
+
endif # SOC_AMD_COMMON
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