Attention is currently required from: Lance Zhao, Maulik V Vaghela, Tim Wawrzynczak, Meera Ravindranath, Subrata Banik, Archana Patni, Michael Niewöhner, Ronak Kanabar.

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4 comments:

• Commit Message:

  • Patch Set #2, Line 8:

    Please describe the problem. S0i3 does not work how?

  • Patch Set #2, Line 9: CB

    coreboot

  • Patch Set #2, Line 12:

    Please add the tag:

    Fixes: 0e905801 (soc/intel: transition full control over PM Timer from FSP to coreboot)

  • Patch Set #2, Line 14: TEST=Boot gimble to OS and verify S0i3 counter incrementing

    How can this be verified?

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